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Searched refs:RCU_CFG0 (Results 1 – 25 of 25) sorted by relevance

/hal_gigadevice-latest/gd32f3x0/cmsis/gd/gd32f3x0/source/
Dsystem_gd32f3x0.c174 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC |\ in SystemInit()
176 RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PLLMF | RCU_CFG0_PLLMF4 | RCU_CFG0_PLLDV); in SystemInit()
178 RCU_CFG0 &= ~(RCU_CFG0_USBFSPSC); in SystemInit()
258 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_8m_hxtal()
260 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_8m_hxtal()
262 RCU_CFG0 |= RCU_APB1_CKAHB_DIV1; in system_clock_8m_hxtal()
265 RCU_CFG0 &= ~RCU_CFG0_SCS; in system_clock_8m_hxtal()
266 RCU_CFG0 |= RCU_CKSYSSRC_HXTAL; in system_clock_8m_hxtal()
269 while(0U == (RCU_CFG0 & RCU_SCSS_HXTAL)){ in system_clock_8m_hxtal()
300 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_72m_hxtal()
[all …]
/hal_gigadevice-latest/gd32a50x/cmsis/gd/gd32a50x/source/
Dsystem_gd32a50x.c112 RCU_CFG0 &= ~RCU_CFG0_SCS; in SystemInit()
119 RCU_CFG0 = 0x00020000U; in SystemInit()
226 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_8m_irc8m()
228 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_8m_irc8m()
230 RCU_CFG0 |= RCU_APB1_CKAHB_DIV1; in system_clock_8m_irc8m()
233 RCU_CFG0 &= ~RCU_CFG0_SCS; in system_clock_8m_irc8m()
234 RCU_CFG0 |= RCU_CKSYSSRC_IRC8M; in system_clock_8m_irc8m()
237 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_IRC8M) { in system_clock_8m_irc8m()
274 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_24m_pll_irc8m()
276 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_24m_pll_irc8m()
[all …]
/hal_gigadevice-latest/gd32vf103/riscv/source/
Dsystem_gd32vf103.c157 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | in SystemInit()
168 RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PREDV0_LSB | RCU_CFG0_PLLMF | in SystemInit()
193 scss = GET_BITS(RCU_CFG0, 2, 3); in SystemCoreClockUpdate()
210 pllsel = (RCU_CFG0 & RCU_CFG0_PLLSEL); in SystemCoreClockUpdate()
236 pllmf = GET_BITS(RCU_CFG0, 18, 21); in SystemCoreClockUpdate()
238 if((RCU_CFG0 & RCU_CFG0_PLLMF_4)){ in SystemCoreClockUpdate()
292 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_hxtal()
294 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_hxtal()
296 RCU_CFG0 |= RCU_APB1_CKAHB_DIV2; in system_clock_hxtal()
299 RCU_CFG0 &= ~RCU_CFG0_SCS; in system_clock_hxtal()
[all …]
/hal_gigadevice-latest/gd32f403/cmsis/gd/gd32f403/source/
Dsystem_gd32f403.c68 RCU_CFG0 |= RCU_AHB_CKSYS_DIV2; \
137 RCU_CFG0 = 0x00000000U; in SystemInit() local
220 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_8m_irc8m()
222 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_8m_irc8m()
224 RCU_CFG0 |= RCU_APB1_CKAHB_DIV2; in system_clock_8m_irc8m()
227 RCU_CFG0 &= ~RCU_CFG0_SCS; in system_clock_8m_irc8m()
228 RCU_CFG0 |= RCU_CKSYSSRC_IRC8M; in system_clock_8m_irc8m()
231 while(0U != (RCU_CFG0 & RCU_SCSS_IRC8M)){ in system_clock_8m_irc8m()
269 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_48m_irc8m()
271 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_48m_irc8m()
[all …]
/hal_gigadevice-latest/gd32e50x/cmsis/gd/gd32e50x/source/
Dsystem_gd32e50x.c118 RCU_CFG0 &= ~RCU_CFG0_SCS; in SystemInit()
132 RCU_CFG0 = 0x00000000U; in SystemInit()
202 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_8m_irc8m()
204 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_8m_irc8m()
206 RCU_CFG0 |= RCU_APB1_CKAHB_DIV2; in system_clock_8m_irc8m()
209 RCU_CFG0 &= ~RCU_CFG0_SCS; in system_clock_8m_irc8m()
210 RCU_CFG0 |= RCU_CKSYSSRC_IRC8M; in system_clock_8m_irc8m()
213 while(0U != (RCU_CFG0 & RCU_SCSS_IRC8M)){ in system_clock_8m_irc8m()
252 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_72m_irc8m()
254 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_72m_irc8m()
[all …]
/hal_gigadevice-latest/gd32e10x/cmsis/gd/gd32e10x/source/
Dsystem_gd32e10x.c67 RCU_CFG0 |= RCU_AHB_CKSYS_DIV2; \
70 RCU_CFG0 |= RCU_AHB_CKSYS_DIV4; \
131 RCU_CFG0 &= ~RCU_CFG0_SCS; in SystemInit()
139 RCU_CFG0 = 0x00000000U; in SystemInit()
212 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_8m_irc8m()
214 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_8m_irc8m()
216 RCU_CFG0 |= RCU_APB1_CKAHB_DIV2; in system_clock_8m_irc8m()
219 RCU_CFG0 &= ~RCU_CFG0_SCS; in system_clock_8m_irc8m()
220 RCU_CFG0 |= RCU_CKSYSSRC_IRC8M; in system_clock_8m_irc8m()
223 while(0U != (RCU_CFG0 & RCU_SCSS_IRC8M)){ in system_clock_8m_irc8m()
[all …]
/hal_gigadevice-latest/gd32f4xx/cmsis/gd/gd32f4xx/source/
Dsystem_gd32f4xx.c63 RCU_CFG0 |= RCU_AHB_CKSYS_DIV2; \
65 RCU_CFG0 |= RCU_AHB_CKSYS_DIV4; \
135 RCU_CFG0 &= ~RCU_CFG0_SCS; in SystemInit()
144 RCU_CFG0 = 0x00000000U; in SystemInit()
147 while(0 != (RCU_CFG0 & RCU_SCSS_IRC16M)){ in SystemInit()
227 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_16m_irc16m()
229 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_16m_irc16m()
231 RCU_CFG0 |= RCU_APB1_CKAHB_DIV1; in system_clock_16m_irc16m()
234 RCU_CFG0 &= ~RCU_CFG0_SCS; in system_clock_16m_irc16m()
235 RCU_CFG0 |= RCU_CKSYSSRC_IRC16M; in system_clock_16m_irc16m()
[all …]
/hal_gigadevice-latest/gd32l23x/cmsis/gd/gd32l23x/source/
Dsystem_gd32l23x.c88 RCU_CFG0 &= ~RCU_CFG0_SCS; in SystemInit()
91 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | \ in SystemInit()
93 RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PLLMF | RCU_CFG0_PLLDV); in SystemInit()
151 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_8m_hxtal()
153 RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; in system_clock_8m_hxtal()
155 RCU_CFG0 |= RCU_APB1_CKAHB_DIV1; in system_clock_8m_hxtal()
158 RCU_CFG0 &= ~RCU_CFG0_SCS; in system_clock_8m_hxtal()
159 RCU_CFG0 |= RCU_CKSYSSRC_HXTAL; in system_clock_8m_hxtal()
162 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_HXTAL) { in system_clock_8m_hxtal()
197 RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; in system_clock_64m_hxtal()
[all …]
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_rcu.c61 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC |\ in rcu_deinit()
63 RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PLLMF | RCU_CFG0_PLLMF4 | RCU_CFG0_PLLDV); in rcu_deinit()
65 RCU_CFG0 &= ~(RCU_CFG0_USBFSPSC); in rcu_deinit()
251 cksys_source = RCU_CFG0; in rcu_system_clock_source_config()
254 RCU_CFG0 = (ck_sys | cksys_source); in rcu_system_clock_source_config()
269 return (RCU_CFG0 & RCU_CFG0_SCSS); in rcu_system_clock_source_get()
283 ahbpsc = RCU_CFG0; in rcu_ahb_clock_config()
286 RCU_CFG0 = (ck_ahb | ahbpsc); in rcu_ahb_clock_config()
304 apb1psc = RCU_CFG0; in rcu_apb1_clock_config()
307 RCU_CFG0 = (ck_apb1 | apb1psc); in rcu_apb1_clock_config()
[all …]
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_rcu.c63 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | in rcu_deinit()
248 reg = RCU_CFG0; in rcu_system_clock_source_config()
251 RCU_CFG0 = (reg | ck_sys); in rcu_system_clock_source_config()
265 return (RCU_CFG0 & RCU_CFG0_SCSS); in rcu_system_clock_source_get()
280 reg = RCU_CFG0; in rcu_ahb_clock_config()
284 RCU_CFG0 = (reg | ck_ahb); in rcu_ahb_clock_config()
303 reg = RCU_CFG0; in rcu_apb1_clock_config()
307 RCU_CFG0 = (reg | ck_apb1); in rcu_apb1_clock_config()
326 reg = RCU_CFG0; in rcu_apb2_clock_config()
330 RCU_CFG0 = (reg | ck_apb2); in rcu_apb2_clock_config()
[all …]
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_rcu.c60 RCU_CFG0 &= ~RCU_CFG0_SCS; in rcu_deinit()
61 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_IRC8M) { in rcu_deinit()
67 RCU_CFG0 = 0x00020000U; in rcu_deinit()
255 reg = RCU_CFG0; in rcu_system_clock_source_config()
258 RCU_CFG0 = (reg | ck_sys); in rcu_system_clock_source_config()
272 return (RCU_CFG0 & RCU_CFG0_SCSS); in rcu_system_clock_source_get()
286 reg = RCU_CFG0; in rcu_ahb_clock_config()
289 RCU_CFG0 = (reg | ck_ahb); in rcu_ahb_clock_config()
307 reg = RCU_CFG0; in rcu_apb1_clock_config()
310 RCU_CFG0 = (reg | ck_apb1); in rcu_apb1_clock_config()
[all …]
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_rcu.c74 RCU_CFG0 &= ~RCU_CFG0_SCS; in rcu_deinit()
80 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | in rcu_deinit()
86 RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PREDV0_LSB | RCU_CFG0_PLLMF | in rcu_deinit()
274 reg = RCU_CFG0; in rcu_system_clock_source_config()
277 RCU_CFG0 = (reg | ck_sys); in rcu_system_clock_source_config()
291 return (RCU_CFG0 & RCU_CFG0_SCSS); in rcu_system_clock_source_get()
306 reg = RCU_CFG0; in rcu_ahb_clock_config()
310 RCU_CFG0 = (reg | ck_ahb); in rcu_ahb_clock_config()
329 reg = RCU_CFG0; in rcu_apb1_clock_config()
333 RCU_CFG0 = (reg | ck_apb1); in rcu_apb1_clock_config()
[all …]
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_rcu.c74 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | in rcu_deinit()
272 reg = RCU_CFG0; in rcu_system_clock_source_config()
275 RCU_CFG0 = (reg | ck_sys); in rcu_system_clock_source_config()
289 return (RCU_CFG0 & RCU_CFG0_SCSS); in rcu_system_clock_source_get()
304 reg = RCU_CFG0; in rcu_ahb_clock_config()
308 RCU_CFG0 = (reg | ck_ahb); in rcu_ahb_clock_config()
327 reg = RCU_CFG0; in rcu_apb1_clock_config()
331 RCU_CFG0 = (reg | ck_apb1); in rcu_apb1_clock_config()
350 reg = RCU_CFG0; in rcu_apb2_clock_config()
354 RCU_CFG0 = (reg | ck_apb2); in rcu_apb2_clock_config()
[all …]
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_rcu.c75 RCU_CFG0 &= ~RCU_CFG0_SCS; in rcu_deinit()
84 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | in rcu_deinit()
88 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | in rcu_deinit()
92 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | in rcu_deinit()
333 reg = RCU_CFG0; in rcu_system_clock_source_config()
336 RCU_CFG0 = (reg | ck_sys); in rcu_system_clock_source_config()
350 return (RCU_CFG0 & RCU_CFG0_SCSS); in rcu_system_clock_source_get()
365 reg = RCU_CFG0; in rcu_ahb_clock_config()
369 RCU_CFG0 = (reg | ck_ahb); in rcu_ahb_clock_config()
388 reg = RCU_CFG0; in rcu_apb1_clock_config()
[all …]
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_rcu.c63 RCU_CFG0 &= ~RCU_CFG0_SCS; in rcu_deinit()
70 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | in rcu_deinit()
377 reg = RCU_CFG0; in rcu_system_clock_source_config()
380 RCU_CFG0 = (reg | ck_sys); in rcu_system_clock_source_config()
394 return (RCU_CFG0 & RCU_CFG0_SCSS); in rcu_system_clock_source_get()
409 reg = RCU_CFG0; in rcu_ahb_clock_config()
412 RCU_CFG0 = (reg | ck_ahb); in rcu_ahb_clock_config()
431 reg = RCU_CFG0; in rcu_apb1_clock_config()
434 RCU_CFG0 = (reg | ck_apb1); in rcu_apb1_clock_config()
453 reg = RCU_CFG0; in rcu_apb2_clock_config()
[all …]
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_rcu.c58 RCU_CFG0 &= ~RCU_CFG0_SCS; in rcu_deinit()
61 RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | \ in rcu_deinit()
63 RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PLLMF | RCU_CFG0_PLLDV); in rcu_deinit()
274 cksys_source = RCU_CFG0; in rcu_system_clock_source_config()
277 RCU_CFG0 = (ck_sys | cksys_source); in rcu_system_clock_source_config()
292 return (RCU_CFG0 & RCU_CFG0_SCSS); in rcu_system_clock_source_get()
306 ahbpsc = RCU_CFG0; in rcu_ahb_clock_config()
309 RCU_CFG0 = (ck_ahb | ahbpsc); in rcu_ahb_clock_config()
327 apb1psc = RCU_CFG0; in rcu_apb1_clock_config()
330 RCU_CFG0 = (ck_apb1 | apb1psc); in rcu_apb1_clock_config()
[all …]
/hal_gigadevice-latest/
DREADME.md137 pllmf = GET_BITS(RCU_CFG0, 18, 21);
138 pllmf += ((RCU_CFG0 & RCU_CFG0_PLLMF_4) ? 15U : 0U);
139 - pllmf += ((0xFU == (RCU_CFG0 & RCU_CFG0_PLLMF)) ? 1U : 2U);
140 + pllmf += ((RCU_CFG0_PLLMF == (RCU_CFG0 & RCU_CFG0_PLLMF)) ? 1U : 2U);
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_rcu.h49 #define RCU_CFG0 REG32(RCU + 0x00000004U) /*!< clock configuration re… macro
69 #define RCU_CFG0 REG32(RCU + 0x00000004U) /*!< clock configuration re… macro
90 #define RCU_CFG0 REG32(RCU + 0x00000004U) /*!< clock configuration re… macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_rcu.h47 #define RCU_CFG0 REG32(RCU + 0x04U) /*!< clock configuration register… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_rcu.h45 #define RCU_CFG0 REG32(RCU + 0x00000004U) /*!< clock configurat… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_rcu.h47 #define RCU_CFG0 REG32(RCU + 0x00000004U) /*!< configuration register 0 */ macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_rcu.h48 #define RCU_CFG0 REG32(RCU + 0x04U) /*!< clock configuration register… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_rcu.h47 #define RCU_CFG0 REG32(RCU + 0x04U) /*!< clock configuration register… macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_rcu.h45 #define RCU_CFG0 REG32(RCU + 0x00000004U) /*!< configuration register 0 */ macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_rcu.h49 #define RCU_CFG0 REG32(RCU + 0x08U) /*!< clock configuration register… macro