Searched refs:PMU_CTL1 (Results 1 – 5 of 5) sorted by relevance
230 PMU_CTL1 &= ~(PMU_CTL1_DPMOD1 | PMU_CTL1_DPMOD2); in pmu_to_deepsleepmode()282 PMU_CTL1 &= ~PMU_CTL1_DPMOD2; in pmu_to_deepsleepmode_1()284 PMU_CTL1 |= PMU_CTL1_DPMOD1; in pmu_to_deepsleepmode_1()312 PMU_CTL1 &= ~PMU_CTL1_DPMOD1; in pmu_to_deepsleepmode_1()337 PMU_CTL1 &= ~PMU_CTL1_DPMOD1; in pmu_to_deepsleepmode_2()339 PMU_CTL1 |= PMU_CTL1_DPMOD2; in pmu_to_deepsleepmode_2()367 PMU_CTL1 &= ~PMU_CTL1_DPMOD2; in pmu_to_deepsleepmode_2()
345 PMU_CTL1 |= state; in pmu_sram_power_config()359 PMU_CTL1 |= state; in pmu_core1_power_config()370 PMU_CTL1 &= ~PMU_CTL1_NRRD2; in pmu_deepsleep2_retention_enable()381 PMU_CTL1 |= PMU_CTL1_NRRD2; in pmu_deepsleep2_retention_disable()395 PMU_CTL1 &= ~PMU_CTL1_SRAM1PD2; in pmu_deepsleep2_sram_power_config()396 PMU_CTL1 |= state; in pmu_deepsleep2_sram_power_config()
57 PMU_CTL1 |= PMU_CORE1_WAKE; in cau_deinit()
48 #define PMU_CTL1 REG32((PMU) + 0x00000008U) /*!< PMU control register 1 */ macro
46 #define PMU_CTL1 REG32((PMU) + 0x00000008U) /*!< PMU control regist… macro
