Searched refs:CTL1_ETSIC (Results 1 – 7 of 7) sorted by relevance
241 #define CTL1_ETSIC(regval) (BITS(12, 14) & ((uint32_t)(regval) << 12)) /*!< w… macro242 #define ADC0_1_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0) /*!< T…243 #define ADC0_1_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1) /*!< T…244 #define ADC0_1_EXTTRIG_INSERTED_T1_TRGO CTL1_ETSIC(2) /*!< T…245 #define ADC0_1_EXTTRIG_INSERTED_T1_CH0 CTL1_ETSIC(3) /*!< T…246 #define ADC0_1_EXTTRIG_INSERTED_T2_CH3 CTL1_ETSIC(4) /*!< T…247 #define ADC0_1_EXTTRIG_INSERTED_T3_TRGO CTL1_ETSIC(5) /*!< T…248 #define ADC0_1_EXTTRIG_INSERTED_T7_CH3 CTL1_ETSIC(6) /*!< T…249 #define ADC0_1_EXTTRIG_INSERTED_EXTI_15 CTL1_ETSIC(6) /*!< e…250 #define ADC0_1_2_EXTTRIG_INSERTED_NONE CTL1_ETSIC(7) /*!< s…[all …]
247 #define CTL1_ETSIC(regval) (BITS(16,19) & ((uint32_t)(regval) << 16)) macro248 #define ADC_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(0) /*!< timer0 capture compar…249 #define ADC_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(1) /*!< timer0 TRGO event */250 #define ADC_EXTTRIG_INSERTED_T1_CH0 CTL1_ETSIC(2) /*!< timer1 capture compar…251 #define ADC_EXTTRIG_INSERTED_T1_TRGO CTL1_ETSIC(3) /*!< timer1 TRGO event */252 #define ADC_EXTTRIG_INSERTED_T2_CH1 CTL1_ETSIC(4) /*!< timer2 capture compar…253 #define ADC_EXTTRIG_INSERTED_T2_CH3 CTL1_ETSIC(5) /*!< timer2 capture compar…254 #define ADC_EXTTRIG_INSERTED_T3_CH0 CTL1_ETSIC(6) /*!< timer3 capture compar…255 #define ADC_EXTTRIG_INSERTED_T3_CH1 CTL1_ETSIC(7) /*!< timer3 capture compar…256 #define ADC_EXTTRIG_INSERTED_T3_CH2 CTL1_ETSIC(8) /*!< timer3 capture compar…[all …]
194 #define CTL1_ETSIC(regval) (BITS(12,14) & ((uint32_t)(regval) << 12)) /*!< write val… macro195 #define ADC0_1_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0) /*!< timer 0 T…196 #define ADC0_1_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1) /*!< timer 0 C…197 #define ADC0_1_EXTTRIG_INSERTED_T2_CH3 CTL1_ETSIC(4) /*!< timer 2 C…198 #define ADC0_1_EXTTRIG_INSERTED_T3_TRGO CTL1_ETSIC(5) /*!< timer 3 T…199 #define ADC0_1_EXTTRIG_INSERTED_EXTI_15 CTL1_ETSIC(6) /*!< external …200 #define ADC0_1_EXTTRIG_INSERTED_T7_CH3 CTL1_ETSIC(6) /*!< timer 7 C…201 #define ADC0_1_2_EXTTRIG_INSERTED_NONE CTL1_ETSIC(7) /*!< software …203 #define ADC2_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0) /*!< timer 0 T…204 #define ADC2_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1) /*!< timer 0 C…[all …]
171 #define CTL1_ETSIC(regval) (BITS(12,14) & ((uint32_t)(regval) << 12)) macro172 #define ADC_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0) /*!< TIMER0 TR…173 #define ADC_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1) /*!< TIMER0 CH…174 #define ADC_EXTTRIG_INSERTED_T1_TRGO CTL1_ETSIC(2) /*!< TIMER1 TR…175 #define ADC_EXTTRIG_INSERTED_T1_CH0 CTL1_ETSIC(3) /*!< TIMER1 CH…176 #define ADC_EXTTRIG_INSERTED_T2_CH3 CTL1_ETSIC(4) /*!< TIMER2 CH…177 #define ADC_EXTTRIG_INSERTED_T14_TRGO CTL1_ETSIC(5) /*!< TIMER14 T…178 #define ADC_EXTTRIG_INSERTED_EXTI_15 CTL1_ETSIC(6) /*!< external …179 #define ADC_EXTTRIG_INSERTED_NONE CTL1_ETSIC(7) /*!< software …
192 #define CTL1_ETSIC(regval) (BITS(12,14) & ((uint32_t)(regval) << 12)) /*!< write val… macro193 #define ADC0_1_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0) /*!< timer 0 T…194 #define ADC0_1_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1) /*!< timer 0 C…195 #define ADC0_1_EXTTRIG_INSERTED_T1_TRGO CTL1_ETSIC(2) /*!< timer 1 T…196 #define ADC0_1_EXTTRIG_INSERTED_T1_CH0 CTL1_ETSIC(3) /*!< timer 1 C…197 #define ADC0_1_EXTTRIG_INSERTED_T2_CH3 CTL1_ETSIC(4) /*!< timer 2 C…198 #define ADC0_1_EXTTRIG_INSERTED_T3_TRGO CTL1_ETSIC(5) /*!< timer 3 T…199 #define ADC0_1_EXTTRIG_INSERTED_EXTI_15 CTL1_ETSIC(6) /*!< external …200 #define ADC0_1_EXTTRIG_INSERTED_T7_CH3 CTL1_ETSIC(6) /*!< timer 7 C…201 #define ADC0_1_EXTTRIG_INSERTED_NONE CTL1_ETSIC(7) /*!< software …
190 #define CTL1_ETSIC(regval) (BITS(12,14) & ((uint32_t)(regval) << 12)) /*!< write val… macro192 #define ADC0_1_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0) /*!< TIMER0 TR…193 #define ADC0_1_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1) /*!< TIMER0 CH…194 #define ADC0_1_EXTTRIG_INSERTED_T1_TRGO CTL1_ETSIC(2) /*!< TIMER1 TR…195 #define ADC0_1_EXTTRIG_INSERTED_T1_CH0 CTL1_ETSIC(3) /*!< TIMER1 CH…196 #define ADC0_1_EXTTRIG_INSERTED_T2_CH3 CTL1_ETSIC(4) /*!< TIMER2 CH…197 #define ADC0_1_EXTTRIG_INSERTED_T3_TRGO CTL1_ETSIC(5) /*!< TIMER3 TR…198 #define ADC0_1_EXTTRIG_INSERTED_EXTI_15 CTL1_ETSIC(6) /*!< external …199 #define ADC0_1_EXTTRIG_INSERTED_NONE CTL1_ETSIC(7) /*!< software …
182 #define CTL1_ETSIC(regval) (BITS(12, 14) & ((uint32_t)(regval) << 12)) macro183 #define ADC_EXTTRIG_INSERTED_T1_TRGO CTL1_ETSIC(2) /*!< TIMER1 TRG…184 #define ADC_EXTTRIG_INSERTED_T1_CH0 CTL1_ETSIC(3) /*!< TIMER1 CH0…185 #define ADC_EXTTRIG_INSERTED_T2_CH3 CTL1_ETSIC(4) /*!< TIMER2 CH3…186 #define ADC_EXTTRIG_INSERTED_EXTI_15 CTL1_ETSIC(6) /*!< external i…187 #define ADC_EXTTRIG_INSERTED_NONE CTL1_ETSIC(7) /*!< software t…
