Lines Matching refs:CTL1_ETSIC
241 #define CTL1_ETSIC(regval) (BITS(12, 14) & ((uint32_t)(regval) << 12)) /*!< w… macro
242 #define ADC0_1_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0) /*!< T…
243 #define ADC0_1_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1) /*!< T…
244 #define ADC0_1_EXTTRIG_INSERTED_T1_TRGO CTL1_ETSIC(2) /*!< T…
245 #define ADC0_1_EXTTRIG_INSERTED_T1_CH0 CTL1_ETSIC(3) /*!< T…
246 #define ADC0_1_EXTTRIG_INSERTED_T2_CH3 CTL1_ETSIC(4) /*!< T…
247 #define ADC0_1_EXTTRIG_INSERTED_T3_TRGO CTL1_ETSIC(5) /*!< T…
248 #define ADC0_1_EXTTRIG_INSERTED_T7_CH3 CTL1_ETSIC(6) /*!< T…
249 #define ADC0_1_EXTTRIG_INSERTED_EXTI_15 CTL1_ETSIC(6) /*!< e…
250 #define ADC0_1_2_EXTTRIG_INSERTED_NONE CTL1_ETSIC(7) /*!< s…
252 #define ADC0_1_EXTTRIG_INSERTED_SHRTIMER_ADCTRG1 (ADC_CTL1_ETSIC4 | CTL1_ETSIC(0)) /*!< S…
253 #define ADC0_1_EXTTRIG_INSERTED_SHRTIMER_ADCTRG3 (ADC_CTL1_ETSIC4 | CTL1_ETSIC(1)) /*!< S…
255 #define ADC2_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0) /*!< T…
256 #define ADC2_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1) /*!< T…
257 #define ADC2_EXTTRIG_INSERTED_T3_CH2 CTL1_ETSIC(2) /*!< T…
258 #define ADC2_EXTTRIG_INSERTED_T7_CH1 CTL1_ETSIC(3) /*!< T…
259 #define ADC2_EXTTRIG_INSERTED_T7_CH3 CTL1_ETSIC(4) /*!< T…
260 #define ADC2_EXTTRIG_INSERTED_T4_TRGO CTL1_ETSIC(5) /*!< T…
261 #define ADC2_EXTTRIG_INSERTED_T4_CH3 CTL1_ETSIC(6) /*!< T…