Searched refs:rx_conf1 (Results 1 – 8 of 8) sorted by relevance
338 hw->rx_conf1.rx_bck_div_num = val - 1; in i2s_ll_rx_set_bck_div_num()430 hw->rx_conf1.rx_tdm_ws_width = width - 1; in i2s_ll_rx_set_ws_width()466 hw->rx_conf1.rx_bits_mod = data_bit - 1; in i2s_ll_rx_set_sample_bit()467 hw->rx_conf1.rx_tdm_chan_bits = chan_bit - 1; in i2s_ll_rx_set_sample_bit()489 hw->rx_conf1.rx_half_sample_bits = half_sample_bits - 1; in i2s_ll_rx_set_half_sample_bit()511 hw->rx_conf1.rx_msb_shift = msb_shift_enable; in i2s_ll_rx_enable_msb_shift()
351 hw->rx_conf1.rx_bck_div_num = val - 1; in i2s_ll_rx_set_bck_div_num()442 hw->rx_conf1.rx_tdm_ws_width = width - 1; in i2s_ll_rx_set_ws_width()478 hw->rx_conf1.rx_bits_mod = data_bit - 1; in i2s_ll_rx_set_sample_bit()479 hw->rx_conf1.rx_tdm_chan_bits = chan_bit - 1; in i2s_ll_rx_set_sample_bit()501 hw->rx_conf1.rx_half_sample_bits = half_sample_bits - 1; in i2s_ll_rx_set_half_sample_bit()523 hw->rx_conf1.rx_msb_shift = msb_shift_enable; in i2s_ll_rx_enable_msb_shift()
338 hw->rx_conf1.rx_bck_div_num = val - 1; in i2s_ll_rx_set_bck_div_num()429 hw->rx_conf1.rx_tdm_ws_width = width - 1; in i2s_ll_rx_set_ws_width()465 hw->rx_conf1.rx_bits_mod = data_bit - 1; in i2s_ll_rx_set_sample_bit()466 hw->rx_conf1.rx_tdm_chan_bits = chan_bit - 1; in i2s_ll_rx_set_sample_bit()488 hw->rx_conf1.rx_half_sample_bits = half_sample_bits - 1; in i2s_ll_rx_set_half_sample_bit()510 hw->rx_conf1.rx_msb_shift = msb_shift_enable; in i2s_ll_rx_enable_msb_shift()
449 hw->rx_conf1.rx_tdm_ws_width = width - 1; in i2s_ll_rx_set_ws_width()485 hw->rx_conf1.rx_bits_mod = data_bit - 1; in i2s_ll_rx_set_sample_bit()486 hw->rx_conf1.rx_tdm_chan_bits = chan_bit - 1; in i2s_ll_rx_set_sample_bit()508 HAL_FORCE_MODIFY_U32_REG_FIELD(hw->rx_conf1, rx_half_sample_bits, half_sample_bits - 1); in i2s_ll_rx_set_half_sample_bit()
124 } rx_conf1; member
126 } rx_conf1; member
994 volatile i2s_rx_conf1_reg_t rx_conf1; member
992 volatile i2s_rx_conf1_reg_t rx_conf1; member
