Searched refs:read_reg (Results 1 – 25 of 41) sorted by relevance
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147 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x07167 hi = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * hi_num_word)) >> 23) & 0x01169 low = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * low_num_word)) >> 18) & 0x07174 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 0) & 0x03178 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x07188 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x03204 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 27) & 0x07208 vendor_id = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x07213 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 3) & 0x03217 vendor_id = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 7) & 0x03[all …]
131 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F135 hi = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * hi_num_word)) >> 20) & 0x01137 low = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * low_num_word)) >> 4) & 0x07142 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x03146 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x0F153 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 28) & 0x0F161 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 4) & 0x07223 mac0 = self.read_reg(self.MAC_EFUSE_REG)224 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC231 if self.read_reg(self.EFUSE_RD_REPEAT_DATA3_REG)[all …]
67 result = self.read_reg(0x3FF0005C) << 9668 result |= self.read_reg(0x3FF00058) << 6469 result |= self.read_reg(0x3FF00054) << 3270 result |= self.read_reg(0x3FF00050)132 id0 = self.read_reg(self.ESP_OTP_MAC0)133 id1 = self.read_reg(self.ESP_OTP_MAC1)140 mac0 = self.read_reg(self.ESP_OTP_MAC0)141 mac1 = self.read_reg(self.ESP_OTP_MAC1)142 mac3 = self.read_reg(self.ESP_OTP_MAC3)
121 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x07125 hi = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * hi_num_word)) >> 23) & 0x01127 low = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * low_num_word)) >> 18) & 0x07132 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x03136 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 27) & 0x07140 vendor_id = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x07184 mac0 = self.read_reg(self.MAC_EFUSE_REG)185 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC194 self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)212 return (self.read_reg(reg) >> shift) & 0xF[all …]
72 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 22) & 0x0785 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 16) & 0xF89 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 20) & 0x3137 self.read_reg(self.EFUSE_XTS_KEY_LENGTH_256_REG)141 word0 = self.read_reg(self.EFUSE_RD_DIS_REG) & self.EFUSE_RD_DIS155 key_word[i] = self.read_reg(self.EFUSE_BLOCK_KEY0_REG + i * 4)
92 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x0796 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F100 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03115 mac0 = self.read_reg(self.MAC_EFUSE_REG)116 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC
106 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x07110 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x0F114 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 22) & 0x03139 mac0 = self.read_reg(self.MAC_EFUSE_REG)140 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC159 self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)177 return (self.read_reg(reg) >> shift) & 0xF
110 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 20) & 0x07114 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F118 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03147 mac0 = self.read_reg(self.MAC_EFUSE_REG)148 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC157 self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)175 return (self.read_reg(reg) >> shift) & 0xF
98 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x07102 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x07106 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x03131 mac0 = self.read_reg(self.MAC_EFUSE_REG)132 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC153 return (self.read_reg(reg) >> shift) & 0xF
179 self.read_reg(self.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG)185 self.read_reg(self.EFUSE_SPI_BOOT_CRYPT_CNT_REG)192 efuses = self.read_reg(self.EFUSE_RD_ABS_DONE_REG)213 apb_ctl_date = self.read_reg(self.APB_CTL_DATE_ADDR)304 efuse_blk0_rdata5 = self.read_reg(self.EFUSE_BLK0_RDATA5_REG_OFFS)310 efuse_blk0_rdata3_reg = self.read_reg(self.EFUSE_BLK0_RDATA3_REG_OFFS)316 return self.read_reg(self.EFUSE_RD_REG_BASE + (4 * n))334 efuse = self.read_reg(self.EFUSE_VDD_SPI_REG)345 reg = self.read_reg(self.RTC_CNTL_SDIO_CONF_REG)364 strap_reg = self.read_reg(self.GPIO_STRAP_REG)[all …]
55 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0759 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x0763 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x03
102 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x07106 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F110 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03127 self.read_reg(self.PCR_SYSCLK_CONF_REG) & self.PCR_SYSCLK_XTAL_FREQ_V
64 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x0768 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F72 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03
37 def read_reg(self, addr): member in EmulateEfuseController41 return super(EmulateEfuseController, self).read_reg(addr)49 if self.read_reg(self.REGS.EFUSE_REG_CMD) == 0:
143 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)148 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)172 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:173 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:260 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)273 block.fail = self.read_reg(addr_reg_f) & (1 << fail_bit) != 0280 self.read_reg(addr_reg_n) >> num_offs
144 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)149 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)173 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:174 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:253 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)269 reg_value = self.read_reg(addr_reg)
143 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)148 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)172 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:173 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:262 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)278 reg_value = self.read_reg(addr_reg)
143 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)148 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)172 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:173 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:263 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)279 reg_value = self.read_reg(addr_reg)
140 "EFUSE_RD_RS_ERR_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR_REG)164 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:165 if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:261 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR_REG + offs * 4)277 reg_value = self.read_reg(addr_reg)
