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Searched refs:periph (Results 1 – 24 of 24) sorted by relevance

/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dclk_gate_ll.h21 static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) in periph_ll_get_clk_en_mask() argument
23 switch (periph) { in periph_ll_get_clk_en_mask()
67 static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) in periph_ll_get_rst_en_mask() argument
72 switch (periph) { in periph_ll_get_rst_en_mask()
114 static uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) in periph_ll_get_clk_en_reg() argument
116 switch (periph) { in periph_ll_get_clk_en_reg()
135 static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) in periph_ll_get_rst_en_reg() argument
137 switch (periph) { in periph_ll_get_rst_en_reg()
157 static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) in periph_ll_enable_clk_clear_rst() argument
159 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
[all …]
Dgdma_ll.h252 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_rx_connect_to_periph() argument
255 dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M); in gdma_ll_rx_connect_to_periph()
465 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_tx_connect_to_periph() argument
467 (void)periph; in gdma_ll_tx_connect_to_periph()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dclk_gate_ll.h21 static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) in periph_ll_get_clk_en_mask() argument
23 switch (periph) { in periph_ll_get_clk_en_mask()
83 static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) in periph_ll_get_rst_en_mask() argument
88 switch (periph) { in periph_ll_get_rst_en_mask()
158 static uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) in periph_ll_get_clk_en_reg() argument
160 switch (periph) { in periph_ll_get_clk_en_reg()
182 static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) in periph_ll_get_rst_en_reg() argument
184 switch (periph) { in periph_ll_get_rst_en_reg()
206 static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) in periph_ll_enable_clk_clear_rst() argument
208 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
[all …]
Dgdma_ll.h252 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_rx_connect_to_periph() argument
255 dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M); in gdma_ll_rx_connect_to_periph()
465 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_tx_connect_to_periph() argument
467 (void)periph; in gdma_ll_tx_connect_to_periph()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dclk_gate_ll.h21 static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) in periph_ll_get_clk_en_mask() argument
23 switch (periph) { in periph_ll_get_clk_en_mask()
91 static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) in periph_ll_get_rst_en_mask() argument
95 switch (periph) { in periph_ll_get_rst_en_mask()
190 static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) in periph_ll_get_clk_en_reg() argument
192 switch (periph) { in periph_ll_get_clk_en_reg()
211 static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) in periph_ll_get_rst_en_reg() argument
213 switch (periph) { in periph_ll_get_rst_en_reg()
232 static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) in periph_ll_enable_clk_clear_rst() argument
234 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
[all …]
/hal_espressif-latest/components/hal/esp32/include/hal/
Dclk_gate_ll.h19 static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) in periph_ll_get_clk_en_mask() argument
21 switch (periph) { in periph_ll_get_clk_en_mask()
93 static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) in periph_ll_get_rst_en_mask() argument
95 switch (periph) { in periph_ll_get_rst_en_mask()
177 static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) in periph_ll_get_clk_en_reg() argument
179 switch (periph) { in periph_ll_get_clk_en_reg()
199 static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) in periph_ll_get_rst_en_reg() argument
201 switch (periph) { in periph_ll_get_rst_en_reg()
221 static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) in periph_ll_enable_clk_clear_rst() argument
223 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
[all …]
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dclk_gate_ll.h21 static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) in periph_ll_get_clk_en_mask() argument
23 switch (periph) { in periph_ll_get_clk_en_mask()
105 static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) in periph_ll_get_rst_en_mask() argument
107 switch (periph) { in periph_ll_get_rst_en_mask()
199 static uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) in periph_ll_get_clk_en_reg() argument
201 switch (periph) { in periph_ll_get_clk_en_reg()
226 static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) in periph_ll_get_rst_en_reg() argument
228 switch (periph) { in periph_ll_get_rst_en_reg()
253 static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) in periph_ll_enable_clk_clear_rst() argument
255 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
[all …]
Dgdma_ll.h299 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_rx_connect_to_periph() argument
302 dev->channel[channel].in.conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M); in gdma_ll_rx_connect_to_periph()
538 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_tx_connect_to_periph() argument
540 (void)periph; in gdma_ll_tx_connect_to_periph()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dclk_gate_ll.h19 static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) in periph_ll_get_clk_en_mask() argument
21 switch (periph) { in periph_ll_get_clk_en_mask()
97 static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) in periph_ll_get_rst_en_mask() argument
102 switch (periph) { in periph_ll_get_rst_en_mask()
197 static uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) in periph_ll_get_clk_en_reg() argument
199 switch (periph) { in periph_ll_get_clk_en_reg()
271 static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) in periph_ll_get_rst_en_reg() argument
274 switch (periph) { in periph_ll_get_rst_en_reg()
338 static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) in periph_ll_enable_clk_clear_rst() argument
340 SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
[all …]
Dgdma_ll.h299 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_rx_connect_to_periph() argument
302 dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M); in gdma_ll_rx_connect_to_periph()
522 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_tx_connect_to_periph() argument
524 (void)periph; in gdma_ll_tx_connect_to_periph()
/hal_espressif-latest/components/esp_hw_support/
Dperiph_ctrl.c24 void periph_module_enable(periph_module_t periph) in periph_module_enable() argument
26 assert(periph < PERIPH_MODULE_MAX); in periph_module_enable()
28 if (ref_counts[periph] == 0) { in periph_module_enable()
29 periph_ll_enable_clk_clear_rst(periph); in periph_module_enable()
31 ref_counts[periph]++; in periph_module_enable()
35 void periph_module_disable(periph_module_t periph) in periph_module_disable() argument
37 assert(periph < PERIPH_MODULE_MAX); in periph_module_disable()
39 ref_counts[periph]--; in periph_module_disable()
40 if (ref_counts[periph] == 0) { in periph_module_disable()
41 periph_ll_disable_clk_set_rst(periph); in periph_module_disable()
[all …]
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dclk_gate_ll.h21 static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) in periph_ll_get_clk_en_mask() argument
23 switch (periph) { in periph_ll_get_clk_en_mask()
94 static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) in periph_ll_get_rst_en_mask() argument
98 switch (periph) { in periph_ll_get_rst_en_mask()
180 static uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) in periph_ll_get_clk_en_reg() argument
182 switch (periph) { in periph_ll_get_clk_en_reg()
252 static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) in periph_ll_get_rst_en_reg() argument
254 switch (periph) { in periph_ll_get_rst_en_reg()
323 static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) in periph_ll_enable_clk_clear_rst() argument
325 uint32_t clk_en_reg = periph_ll_get_clk_en_reg(periph); in periph_ll_enable_clk_clear_rst()
[all …]
Dgdma_ll.h299 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_rx_connect_to_periph() argument
302 dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M); in gdma_ll_rx_connect_to_periph()
522 …nnect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id) in gdma_ll_tx_connect_to_periph() argument
524 (void)periph; in gdma_ll_tx_connect_to_periph()
/hal_espressif-latest/components/esp_hw_support/include/esp_private/
Dperiph_ctrl.h23 void periph_module_enable(periph_module_t periph);
34 void periph_module_disable(periph_module_t periph);
43 void periph_module_reset(periph_module_t periph);
Dgdma.h100 gdma_trigger_peripheral_t periph; /*!< Target peripheral which will trigger DMA operations */ member
111 (gdma_trigger_t) { .periph = peri, .instance_id = SOC_##peri##id }
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dperiph_defs.h60 #define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE… argument
/hal_espressif-latest/components/driver/deprecated/
Dadc_i2s_deprecated.c43 #define ADC_CHANNEL_CHECK(periph, channel) ADC_CHECK(channel < SOC_ADC_CHANNEL_NUM(periph), "ADC"#p… argument
44 #define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel]) argument
Dadc_dma_legacy.c52 #define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel]) argument
Dadc_legacy.c43 #define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel]) argument
Di2s_legacy.c315 gdma_trigger_t trig = {.periph = GDMA_TRIG_PERIPH_I2S}; in i2s_dma_intr_init()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dperiph_defs.h62 #define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE… argument
/hal_espressif-latest/components/esp_adc/
Dadc_continuous.c48 #define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel]) argument
/hal_espressif-latest/components/esp_hw_support/dma/
Dgdma.c210 …gdma_ll_tx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.periph, trig_periph.instan… in gdma_connect()
224 …gdma_ll_rx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.periph, trig_periph.instan… in gdma_connect()
/hal_espressif-latest/components/esp_pm/
DKconfig115 default n #TODO: enable by default if periph init/deinit management supported (WIFI-5252)