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Searched refs:fe_fpu (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-latest/components/esp_hw_support/port/esp32c2/
Drtc_sleep.c34 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_DC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
35 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_PBUS_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
36 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_AGC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
42 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
43 REG_SET_FIELD(FE2_TX_INTERP_CTRL, FE2_TX_INF_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
/hal_espressif-latest/components/esp_hw_support/port/esp32c3/
Drtc_sleep.c41 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_DC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
42 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_PBUS_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
43 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_AGC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
49 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
50 REG_SET_FIELD(FE2_TX_INTERP_CTRL, FE2_TX_INF_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
/hal_espressif-latest/components/esp_hw_support/port/esp32s3/
Drtc_sleep.c35 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_DC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
36 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_PBUS_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
37 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_AGC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
43 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
44 REG_SET_FIELD(FE2_TX_INTERP_CTRL, FE2_TX_INF_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Drtc_sleep.c34 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_DC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
35 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_PBUS_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
36 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_AGC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
42 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
43 REG_SET_FIELD(FE2_TX_INTERP_CTRL, FE2_TX_INF_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Drtc.h520 uint32_t fe_fpu : 1; //!< Set to 1 to power UP WiFi in sleep member
534 .fe_fpu = (val), \
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Drtc.h548 uint32_t fe_fpu : 1; //!< Set to 1 to power UP WiFi in sleep member
563 .fe_fpu = (val), \
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Drtc.h561 uint32_t fe_fpu : 1; //!< Set to 1 to power UP WiFi in sleep member
576 .fe_fpu = (val), \
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Drtc.h583 uint32_t fe_fpu : 1; //!< Set to 1 to power down WiFi in sleep member
596 .fe_fpu = (val), \