Searched refs:din0_mode (Results 1 – 12 of 12) sorted by relevance
140 …uint32_t din0_mode : 2; /*the input signals are delayed by SPI module cloc… member
256 …uint32_t din0_mode: 2; /*the input signals are delayed by system clock cycles… member
149 …uint32_t din0_mode : 2; /*the input signals are delayed by SPI module cloc… member
264 …uint32_t din0_mode : 2; /*the input signals are delayed by system clock cy… member
157 …uint32_t din0_mode : 2; /*the input signals are delayed by SPI module cloc… member
328 …uint32_t din0_mode : 3; /*SPI_D input delay mode. 0: No delay. 1: Delay fo… member
670 uint32_t din0_mode:2; member
726 …uint32_t din0_mode : 3; /*the input signals are delayed by system clock cy… member
727 …uint32_t din0_mode : 3; /*the input signals are delayed by system clock cy… member
309 …uint32_t din0_mode: 2; /*the input signals are delayed by system cloc… member
444 …uint32_t din0_mode: 3; /*the input signals are delayed by system clock cycl… member
