Searched refs:dig_dbias_slp (Results 1 – 12 of 12) sorted by relevance
/hal_espressif-latest/components/esp_hw_support/port/esp32c2/ |
D | rtc_sleep.c | 113 out_config->dig_dbias_slp = RTC_CNTL_DBIAS_1V10; in rtc_sleep_get_default_config() 122 out_config->dig_dbias_slp = 0; in rtc_sleep_get_default_config() 133 out_config->dig_dbias_slp = RTC_CNTL_DIG_DBIAS_LIGHTSLEEP_0V6; in rtc_sleep_get_default_config() 154 REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG_SLEEP, cfg.dig_dbias_slp); in rtc_sleep_init()
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/hal_espressif-latest/components/esp_hw_support/port/esp32s3/ |
D | rtc_sleep.c | 80 out_config->dig_dbias_slp = 0; //not used in rtc_sleep_get_default_config() 132 out_config->dig_dbias_slp = RTC_CNTL_DBIAS_1V10; in rtc_sleep_get_default_config() 144 out_config->dig_dbias_slp = 0; in rtc_sleep_get_default_config() 154 out_config->dig_dbias_slp = RTC_CNTL_DBIAS_SLP; in rtc_sleep_get_default_config() 214 REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG_SLEEP, cfg.dig_dbias_slp); in rtc_sleep_init()
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/hal_espressif-latest/components/esp_hw_support/port/esp32s2/ |
D | rtc_sleep.c | 66 out_config->dig_dbias_slp = 0; //not used in rtc_sleep_get_default_config() 123 out_config->dig_dbias_slp = RTC_CNTL_DBIAS_1V10; in rtc_sleep_get_default_config() 135 out_config->dig_dbias_slp = RTC_CNTL_DIG_DBIAS_LIGHTSLEEP_0V9; in rtc_sleep_get_default_config() 146 out_config->dig_dbias_slp = RTC_CNTL_DIG_DBIAS_LIGHTSLEEP_0V75; in rtc_sleep_get_default_config() 215 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_SLP, cfg.dig_dbias_slp); in rtc_sleep_init()
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/hal_espressif-latest/components/esp_hw_support/port/esp32c3/ |
D | rtc_sleep.c | 138 out_config->dig_dbias_slp = RTC_CNTL_DBIAS_1V10; in rtc_sleep_get_default_config() 147 out_config->dig_dbias_slp = 0; in rtc_sleep_get_default_config() 158 out_config->dig_dbias_slp = RTC_CNTL_DIG_DBIAS_LIGHTSLEEP_0V6; in rtc_sleep_get_default_config() 206 REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG_SLEEP, cfg.dig_dbias_slp); in rtc_sleep_init()
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/hal_espressif-latest/components/esp_hw_support/port/esp32/ |
D | rtc_sleep.c | 108 out_config->dig_dbias_slp = RTC_CNTL_DBIAS_0V90; in rtc_sleep_get_default_config() 114 …out_config->dig_dbias_slp = !((sleep_flags) & RTC_SLEEP_PD_INT_8M) ? RTC_CNTL_DBIAS_1V10 : RTC_CNT… in rtc_sleep_get_default_config() 231 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_SLP, cfg.dig_dbias_slp); in rtc_sleep_init()
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/hal_espressif-latest/components/soc/esp32/include/soc/ |
D | rtc.h | 501 uint32_t dig_dbias_slp : 3; //!< set bias for digital domain, in sleep mode member
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D | rtc_cntl_struct.h | 338 uint32_t dig_dbias_slp: 3; /*DIG_REG_DBIAS during sleep*/ member
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/hal_espressif-latest/components/soc/esp32c2/include/soc/ |
D | rtc.h | 549 uint32_t dig_dbias_slp : 5; //!< set bias for digital domain, in sleep mode member
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/hal_espressif-latest/components/soc/esp32c3/include/soc/ |
D | rtc.h | 586 uint32_t dig_dbias_slp : 5; //!< set bias for digital domain, in sleep mode member
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/hal_espressif-latest/components/soc/esp32s3/include/soc/ |
D | rtc.h | 598 uint32_t dig_dbias_slp : 5; //!< set bias for digital domain, in sleep mode member
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/hal_espressif-latest/components/soc/esp32s2/include/soc/ |
D | rtc.h | 614 uint32_t dig_dbias_slp : 3; //!< set bias for digital domain, in sleep mode member
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D | rtc_cntl_struct.h | 424 uint32_t dig_dbias_slp: 3; /*DIG_REG_DBIAS during sleep*/ member
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