| /hal_espressif-latest/components/wpa_supplicant/src/ap/ |
| D | ap_config.c | 74 struct hostapd_config *conf; in hostapd_config_defaults() local
78 conf = (struct hostapd_config *)os_zalloc(sizeof(*conf)); in hostapd_config_defaults()
80 if (conf == NULL || bss == NULL) { in hostapd_config_defaults()
83 os_free(conf); in hostapd_config_defaults()
90 conf->num_bss = 1; in hostapd_config_defaults()
91 conf->bss = bss; in hostapd_config_defaults()
93 conf->beacon_int = 100; in hostapd_config_defaults()
94 conf->rts_threshold = -1; /* use driver default: 2347 */ in hostapd_config_defaults()
95 conf->fragm_threshold = -1; /* user driver default: 2346 */ in hostapd_config_defaults()
96 conf->send_probe_response = 1; in hostapd_config_defaults()
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| D | wpa_auth_ie.c | 24 static int wpa_write_wpa_ie(struct wpa_auth_config *conf, u8 *buf, size_t len) in wpa_write_wpa_ie() argument
37 suite = wpa_cipher_to_suite(WPA_PROTO_WPA, conf->wpa_group); in wpa_write_wpa_ie()
40 conf->wpa_group); in wpa_write_wpa_ie()
49 num_suites = wpa_cipher_put_suites(pos, conf->wpa_pairwise); in wpa_write_wpa_ie()
52 conf->wpa_pairwise); in wpa_write_wpa_ie()
62 if (conf->wpa_key_mgmt & WPA_KEY_MGMT_IEEE8021X) { in wpa_write_wpa_ie()
67 if (conf->wpa_key_mgmt & WPA_KEY_MGMT_PSK) { in wpa_write_wpa_ie()
75 conf->wpa_key_mgmt); in wpa_write_wpa_ie()
88 int wpa_write_rsn_ie(struct wpa_auth_config *conf, u8 *buf, size_t len, in wpa_write_rsn_ie() argument
102 suite = wpa_cipher_to_suite(WPA_PROTO_RSN, conf->wpa_group); in wpa_write_rsn_ie()
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| D | wps_hostapd.c | 102 if (hapd->conf->ap_setup_locked) in hostapd_wps_reenable_ap_pin()
132 if (hapd->conf->ap_pin == NULL || hapd->wps == NULL) in wps_ap_pin_success()
357 struct hostapd_bss_config *conf = hapd->conf; in hostapd_update_wps() local
362 os_memcpy(wps->ssid, conf->ssid.ssid, conf->ssid.ssid_len); in hostapd_update_wps()
363 wps->ssid_len = conf->ssid.ssid_len; in hostapd_update_wps()
427 hapd->conf->ap_setup_locked = 0; in hostapd_wps_ap_pin_enable()
441 os_free(hapd->conf->ap_pin); in wps_ap_pin_disable()
442 hapd->conf->ap_pin = NULL; in wps_ap_pin_disable()
468 os_free(hapd->conf->ap_pin); in wps_ap_pin_set()
469 hapd->conf->ap_pin = os_strdup(data->pin_txt); in wps_ap_pin_set()
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| /hal_espressif-latest/components/hal/esp32s2/include/hal/ |
| D | i2s_ll.h | 125 hw->conf.tx_msb_right = enable; in i2s_ll_tx_enable_msb_right()
136 hw->conf.rx_msb_right = enable; in i2s_ll_rx_enable_msb_right()
147 hw->conf.tx_right_first = enable; in i2s_ll_tx_enable_right_first()
158 hw->conf.rx_right_first = enable; in i2s_ll_rx_enable_right_first()
191 hw->conf.tx_slave_mod = slave_en; in i2s_ll_tx_set_slave_mod()
202 hw->conf.rx_slave_mod = slave_en; in i2s_ll_rx_set_slave_mod()
212 hw->conf.tx_reset = 1; in i2s_ll_tx_reset()
213 hw->conf.tx_reset = 0; in i2s_ll_tx_reset()
223 hw->conf.rx_reset = 1; in i2s_ll_rx_reset()
224 hw->conf.rx_reset = 0; in i2s_ll_rx_reset()
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| D | ledc_ll.h | 62 hw->conf.apb_clk_sel = clk_sel_val; in ledc_ll_set_slow_clk_sel()
75 uint32_t clk_sel_val = hw->conf.apb_clk_sel; in ledc_ll_get_slow_clk_sel()
98 hw->timer_group[speed_mode].timer[timer_sel].conf.low_speed_update = 1; in ledc_ll_ls_timer_update()
112 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 1; in ledc_ll_timer_rst()
113 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 0; in ledc_ll_timer_rst()
127 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 1; in ledc_ll_timer_pause()
141 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 0; in ledc_ll_timer_resume()
156 hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider = clock_divider; in ledc_ll_set_clock_divider()
171 *clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider; in ledc_ll_get_clock_divider()
190 hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 1; in ledc_ll_set_clock_source()
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| /hal_espressif-latest/tools/idf_monitor/idf_monitor_base/ |
| D | chip_specific_config.py | 26 conf = { variable
59 default = dict(conf['default'][0])
61 if chip not in conf.keys():
63 chip_revisions = sorted(list(conf[chip].keys()), key=int)
67 for key in conf[chip][rev].keys():
68 default[key] = conf[chip][rev][key]
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| /hal_espressif-latest/components/wpa_supplicant/esp_supplicant/src/ |
| D | esp_hostap.c | 57 hapd->conf = (struct hostapd_bss_config *)os_zalloc(sizeof(struct hostapd_bss_config)); in hostap_init()
59 if (hapd->conf == NULL) { in hostap_init()
70 hapd->conf->sae_pwe = esp_wifi_get_config_sae_pwe_h2e_internal(WIFI_IF_AP); in hostap_init()
71 auth_conf->sae_pwe = hapd->conf->sae_pwe; in hostap_init()
120 hapd->conf->sae_anti_clogging_threshold = SAE_ANTI_CLOGGING_THRESHOLD; in hostap_init()
145 memcpy(hapd->conf->ssid.ssid, ssid->ssid, ssid->len); in hostap_init()
146 hapd->conf->ssid.ssid_len = ssid->len; in hostap_init()
147 hapd->conf->wpa_key_mgmt = auth_conf->wpa_key_mgmt; in hostap_init()
148 hapd->conf->ssid.wpa_passphrase = (char *)os_zalloc(WIFI_PASSWORD_LEN_MAX); in hostap_init()
149 if (hapd->conf->ssid.wpa_passphrase == NULL) { in hostap_init()
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| /hal_espressif-latest/components/hal/ |
| D | ecdsa_hal.c | 20 static void configure_ecdsa_periph(ecdsa_hal_config_t *conf) in configure_ecdsa_periph() argument
22 efuse_hal_set_ecdsa_key(conf->efuse_key_blk); in configure_ecdsa_periph()
24 ecdsa_ll_set_mode(conf->mode); in configure_ecdsa_periph()
25 ecdsa_ll_set_curve(conf->curve); in configure_ecdsa_periph()
26 ecdsa_ll_set_z_mode(conf->sha_mode); in configure_ecdsa_periph()
93 void ecdsa_hal_gen_signature(ecdsa_hal_config_t *conf, const uint8_t *hash, in ecdsa_hal_gen_signature() argument
100 if (conf->sha_mode == ECDSA_Z_USER_PROVIDED && hash == NULL) { in ecdsa_hal_gen_signature()
108 configure_ecdsa_periph(conf); in ecdsa_hal_gen_signature()
118 int ecdsa_hal_verify_signature(ecdsa_hal_config_t *conf, const uint8_t *hash, const uint8_t *r, con… in ecdsa_hal_verify_signature() argument
129 configure_ecdsa_periph(conf); in ecdsa_hal_verify_signature()
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| /hal_espressif-latest/components/hal/esp32c6/include/hal/ |
| D | sdio_slave_ll.h | 105 host->conf.frc_sdio20 = 0x1f; in sdio_slave_ll_set_timing()
106 host->conf.frc_sdio11 = 0; in sdio_slave_ll_set_timing()
107 host->conf.frc_pos_samp = 0x1f; in sdio_slave_ll_set_timing()
108 host->conf.frc_neg_samp = 0; in sdio_slave_ll_set_timing()
111 host->conf.frc_sdio20 = 0x1f; in sdio_slave_ll_set_timing()
112 host->conf.frc_sdio11 = 0; in sdio_slave_ll_set_timing()
113 host->conf.frc_pos_samp = 0; in sdio_slave_ll_set_timing()
114 host->conf.frc_neg_samp = 0x1f; in sdio_slave_ll_set_timing()
117 host->conf.frc_sdio20 = 0; in sdio_slave_ll_set_timing()
118 host->conf.frc_sdio11 = 0x1f; in sdio_slave_ll_set_timing()
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| D | systimer_ll.h | 26 dev->conf.clk_en = en; in systimer_ll_enable_clock()
44 dev->conf.etm_en = en; in systimer_ll_enable_etm()
52 dev->conf.val |= 1 << (30 - counter_id); in systimer_ll_enable_counter()
54 dev->conf.val &= ~(1 << (30 - counter_id)); in systimer_ll_enable_counter()
61 dev->conf.val |= 1 << ((28 - counter_id * 2) - cpu_id); in systimer_ll_counter_can_stall_by_cpu()
63 dev->conf.val &= ~(1 << ((28 - counter_id * 2) - cpu_id)); in systimer_ll_counter_can_stall_by_cpu()
145 dev->conf.val |= 1 << (24 - alarm_id); in systimer_ll_enable_alarm()
147 dev->conf.val &= ~(1 << (24 - alarm_id)); in systimer_ll_enable_alarm()
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| /hal_espressif-latest/components/hal/esp32/include/hal/ |
| D | sdio_slave_ll.h | 105 host->conf.frc_sdio20 = 0x1f; in sdio_slave_ll_set_timing()
106 host->conf.frc_sdio11 = 0; in sdio_slave_ll_set_timing()
107 host->conf.frc_pos_samp = 0x1f; in sdio_slave_ll_set_timing()
108 host->conf.frc_neg_samp = 0; in sdio_slave_ll_set_timing()
111 host->conf.frc_sdio20 = 0x1f; in sdio_slave_ll_set_timing()
112 host->conf.frc_sdio11 = 0; in sdio_slave_ll_set_timing()
113 host->conf.frc_pos_samp = 0; in sdio_slave_ll_set_timing()
114 host->conf.frc_neg_samp = 0x1f; in sdio_slave_ll_set_timing()
117 host->conf.frc_sdio20 = 0; in sdio_slave_ll_set_timing()
118 host->conf.frc_sdio11 = 0x1f; in sdio_slave_ll_set_timing()
[all …]
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| D | i2s_ll.h | 127 hw->conf.tx_msb_right = enable; in i2s_ll_tx_enable_msb_right()
138 hw->conf.rx_msb_right = enable; in i2s_ll_rx_enable_msb_right()
149 hw->conf.tx_right_first = enable; in i2s_ll_tx_enable_right_first()
160 hw->conf.rx_right_first = enable; in i2s_ll_rx_enable_right_first()
192 hw->conf.tx_slave_mod = slave_en; in i2s_ll_tx_set_slave_mod()
203 hw->conf.rx_slave_mod = slave_en; in i2s_ll_rx_set_slave_mod()
213 hw->conf.tx_reset = 1; in i2s_ll_tx_reset()
214 hw->conf.tx_reset = 0; in i2s_ll_tx_reset()
226 hw->conf.rx_reset = 1; in i2s_ll_rx_reset()
227 hw->conf.rx_reset = 0; in i2s_ll_rx_reset()
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| D | ledc_ll.h | 54 hw->conf.slow_clk_sel = (slow_clk_sel == LEDC_SLOW_CLK_APB); in ledc_ll_set_slow_clk_sel()
67 if (hw->conf.slow_clk_sel) { in ledc_ll_get_slow_clk_sel()
85 hw->timer_group[speed_mode].timer[timer_sel].conf.low_speed_update = 1; in ledc_ll_ls_timer_update()
99 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 1; in ledc_ll_timer_rst()
100 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 0; in ledc_ll_timer_rst()
114 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 1; in ledc_ll_timer_pause()
128 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 0; in ledc_ll_timer_resume()
143 hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider = clock_divider; in ledc_ll_set_clock_divider()
158 *clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider; in ledc_ll_get_clock_divider()
176 hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = (clk_src == LEDC_APB_CLK); in ledc_ll_set_clock_source()
[all …]
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| /hal_espressif-latest/components/wpa_supplicant/esp_supplicant/src/crypto/ |
| D | tls_mbedtls.c | 78 mbedtls_ssl_config conf; /*!< TLS/SSL config to be shared structures */ member
105 mbedtls_ssl_config_free(&tls->conf); in tls_mbedtls_cleanup()
185 ret = mbedtls_ssl_conf_own_cert(&tls->conf, &tls->clientcert, &tls->clientkey); in set_pki_context()
203 mbedtls_ssl_conf_authmode(&tls->conf, MBEDTLS_SSL_VERIFY_REQUIRED); in set_ca_cert()
204 mbedtls_ssl_conf_ca_chain(&tls->conf, tls->cacert_ptr, NULL); in set_ca_cert()
238 mbedtls_ssl_conf_cert_profile(&tls->conf, crt_profile); in tls_set_suiteb_config()
239 mbedtls_ssl_conf_sig_algs(&tls->conf, tls_sig_algs_for_suiteb); in tls_set_suiteb_config()
297 mbedtls_ssl_conf_cert_profile(&tls->conf, crt_profile); in tls_enable_sha1_config()
298 mbedtls_ssl_conf_sig_algs(&tls->conf, tls_sig_algs_for_eap); in tls_enable_sha1_config()
465 mbedtls_ssl_conf_ciphersuites(&tls->conf, in tls_set_ciphersuite()
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| /hal_espressif-latest/components/wpa_supplicant/src/common/ |
| D | dpp.c | 3497 struct dpp_configuration *conf; in dpp_configuration_alloc() local
3501 conf = os_zalloc(sizeof(*conf)); in dpp_configuration_alloc()
3502 if (!conf) in dpp_configuration_alloc()
3512 conf->akm = DPP_AKM_PSK; in dpp_configuration_alloc()
3514 conf->akm = DPP_AKM_SAE; in dpp_configuration_alloc()
3517 conf->akm = DPP_AKM_PSK_SAE; in dpp_configuration_alloc()
3520 conf->akm = DPP_AKM_SAE_DPP; in dpp_configuration_alloc()
3523 conf->akm = DPP_AKM_PSK_SAE_DPP; in dpp_configuration_alloc()
3525 conf->akm = DPP_AKM_DPP; in dpp_configuration_alloc()
3529 return conf; in dpp_configuration_alloc()
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| /hal_espressif-latest/components/hal/include/hal/ |
| D | ieee802154_common_ll.h | 286 IEEE802154.conf.multipan_mask |= BIT(index); in ieee802154_ll_set_multipan_panid()
297 IEEE802154.conf.multipan_mask |= BIT(index); in ieee802154_ll_set_multipan_short_addr()
308 IEEE802154.conf.multipan_mask |= BIT(index); in ieee802154_ll_set_multipan_ext_addr()
323 IEEE802154.conf.multipan_mask = mask; in ieee802154_ll_set_multipan_enable_mask()
328 return IEEE802154.conf.multipan_mask; in ieee802154_ll_get_multipan_enable_mask()
368 return IEEE802154.conf.auto_ack_tx; in ieee802154_ll_get_tx_auto_ack()
373 IEEE802154.conf.auto_ack_tx = enable; in ieee802154_ll_set_tx_auto_ack()
378 return IEEE802154.conf.auto_ack_rx; in ieee802154_ll_get_rx_auto_ack()
383 IEEE802154.conf.auto_ack_rx = enable; in ieee802154_ll_set_rx_auto_ack()
388 return IEEE802154.conf.auto_enhack; in ieee802154_ll_get_tx_enhance_ack()
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| /hal_espressif-latest/components/wpa_supplicant/src/eapol_auth/ |
| D | eapol_auth_sm.c | 30 sm->eapol->cb.set_port_authorized(sm->eapol->conf.ctx, sm->sta, 1)
32 sm->eapol->cb.set_port_authorized(sm->eapol->conf.ctx, sm->sta, 0)
38 #define abortAuth() sm->eapol->cb.abort_auth(sm->eapol->conf.ctx, sm->sta)
39 #define txKey() sm->eapol->cb.tx_key(sm->eapol->conf.ctx, sm->sta)
46 static void eapol_auth_conf_free(struct eapol_auth_config *conf);
55 eapol->cb.logger(eapol->conf.ctx, addr, level, txt); in eapol_auth_logger()
104 sm->eapol->cb.eapol_send(sm->eapol->conf.ctx, sm->sta, in eapol_auth_tx_canned_eap()
133 sm->eapol->cb.eapol_send(sm->eapol->conf.ctx, sm->sta, in eapol_auth_tx_req()
239 sm->eapol->cb.finished(sm->eapol->conf.ctx, sm->sta, 0, in SM_STATE()
297 sm->eapol->cb.finished(sm->eapol->conf.ctx, sm->sta, 0, in SM_STATE()
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| /hal_espressif-latest/components/mbedtls/port/ |
| D | mbedtls_debug.c | 22 void mbedtls_esp_enable_debug_log(mbedtls_ssl_config *conf, int threshold) in mbedtls_esp_enable_debug_log() argument
26 mbedtls_ssl_conf_dbg(conf, mbedtls_esp_debug, NULL); in mbedtls_esp_enable_debug_log()
44 void mbedtls_esp_disable_debug_log(mbedtls_ssl_config *conf) in mbedtls_esp_disable_debug_log() argument
46 mbedtls_ssl_conf_dbg(conf, NULL, NULL); in mbedtls_esp_disable_debug_log()
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| /hal_espressif-latest/components/mbedtls/port/dynamic/ |
| D | esp_ssl_tls.c | 14 int __real_mbedtls_ssl_setup(mbedtls_ssl_context *ssl, const mbedtls_ssl_config *conf);
22 int __wrap_mbedtls_ssl_setup(mbedtls_ssl_context *ssl, const mbedtls_ssl_config *conf);
174 if ( ssl->conf->curve_list != NULL ) in ssl_handshake_init()
177 const mbedtls_ecp_group_id *curve_list = ssl->conf->curve_list; in ssl_handshake_init()
206 ssl->handshake->group_list = ssl->conf->group_list; in ssl_handshake_init()
217 if ( mbedtls_ssl_conf_is_tls12_only( ssl->conf ) && in ssl_handshake_init()
218 ssl->conf->sig_hashes != NULL ) in ssl_handshake_init()
221 const int *sig_hashes = ssl->conf->sig_hashes; in ssl_handshake_init()
283 int __wrap_mbedtls_ssl_setup(mbedtls_ssl_context *ssl, const mbedtls_ssl_config *conf) in __wrap_mbedtls_ssl_setup() argument
285 ssl->conf = conf; in __wrap_mbedtls_ssl_setup()
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| /hal_espressif-latest/components/hal/esp32s3/include/hal/ |
| D | ledc_ll.h | 57 hw->conf.apb_clk_sel = clk_sel_val; in ledc_ll_set_slow_clk_sel()
70 uint32_t clk_sel_val = hw->conf.apb_clk_sel; in ledc_ll_get_slow_clk_sel()
93 hw->timer_group[speed_mode].timer[timer_sel].conf.low_speed_update = 1; in ledc_ll_ls_timer_update()
107 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 1; in ledc_ll_timer_rst()
108 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 0; in ledc_ll_timer_rst()
122 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 1; in ledc_ll_timer_pause()
136 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 0; in ledc_ll_timer_resume()
151 hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider = clock_divider; in ledc_ll_set_clock_divider()
166 *clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider; in ledc_ll_get_clock_divider()
213 hw->timer_group[speed_mode].timer[timer_sel].conf.duty_resolution = duty_resolution; in ledc_ll_set_duty_resolution()
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| D | systimer_ll.h | 25 dev->conf.clk_en = en; in systimer_ll_enable_clock()
43 dev->conf.val |= 1 << (30 - counter_id); in systimer_ll_enable_counter()
45 dev->conf.val &= ~(1 << (30 - counter_id)); in systimer_ll_enable_counter()
52 dev->conf.val |= 1 << ((28 - counter_id * 2) - cpu_id); in systimer_ll_counter_can_stall_by_cpu()
54 dev->conf.val &= ~(1 << ((28 - counter_id * 2) - cpu_id)); in systimer_ll_counter_can_stall_by_cpu()
136 dev->conf.val |= 1 << (24 - alarm_id); in systimer_ll_enable_alarm()
138 dev->conf.val &= ~(1 << (24 - alarm_id)); in systimer_ll_enable_alarm()
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| /hal_espressif-latest/components/hal/esp32c2/include/hal/ |
| D | ledc_ll.h | 56 hw->conf.apb_clk_sel = clk_sel_val; in ledc_ll_set_slow_clk_sel()
69 uint32_t clk_sel_val = hw->conf.apb_clk_sel; in ledc_ll_get_slow_clk_sel()
92 hw->timer_group[speed_mode].timer[timer_sel].conf.para_up = 1; in ledc_ll_ls_timer_update()
106 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 1; in ledc_ll_timer_rst()
107 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 0; in ledc_ll_timer_rst()
121 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 1; in ledc_ll_timer_pause()
135 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 0; in ledc_ll_timer_resume()
150 hw->timer_group[speed_mode].timer[timer_sel].conf.clk_div = clock_divider; in ledc_ll_set_clock_divider()
165 *clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clk_div; in ledc_ll_get_clock_divider()
212 hw->timer_group[speed_mode].timer[timer_sel].conf.duty_res = duty_resolution; in ledc_ll_set_duty_resolution()
[all …]
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| /hal_espressif-latest/components/hal/esp32c3/include/hal/ |
| D | ledc_ll.h | 56 hw->conf.apb_clk_sel = clk_sel_val; in ledc_ll_set_slow_clk_sel()
69 uint32_t clk_sel_val = hw->conf.apb_clk_sel; in ledc_ll_get_slow_clk_sel()
92 hw->timer_group[speed_mode].timer[timer_sel].conf.low_speed_update = 1; in ledc_ll_ls_timer_update()
106 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 1; in ledc_ll_timer_rst()
107 hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 0; in ledc_ll_timer_rst()
121 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 1; in ledc_ll_timer_pause()
135 hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 0; in ledc_ll_timer_resume()
150 hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider = clock_divider; in ledc_ll_set_clock_divider()
165 *clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider; in ledc_ll_get_clock_divider()
212 hw->timer_group[speed_mode].timer[timer_sel].conf.duty_resolution = duty_resolution; in ledc_ll_set_duty_resolution()
[all …]
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| /hal_espressif-latest/components/hal/esp32h2/include/hal/ |
| D | systimer_ll.h | 26 dev->conf.clk_en = en; in systimer_ll_enable_clock()
44 dev->conf.etm_en = en; in systimer_ll_enable_etm()
52 dev->conf.val |= 1 << (30 - counter_id); in systimer_ll_enable_counter()
54 dev->conf.val &= ~(1 << (30 - counter_id)); in systimer_ll_enable_counter()
61 dev->conf.val |= 1 << ((28 - counter_id * 2) - cpu_id); in systimer_ll_counter_can_stall_by_cpu()
63 dev->conf.val &= ~(1 << ((28 - counter_id * 2) - cpu_id)); in systimer_ll_counter_can_stall_by_cpu()
145 dev->conf.val |= 1 << (24 - alarm_id); in systimer_ll_enable_alarm()
147 dev->conf.val &= ~(1 << (24 - alarm_id)); in systimer_ll_enable_alarm()
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| /hal_espressif-latest/components/esp_psram/esp32s3/ |
| D | esp_psram_impl_quad.c | 138 esp_rom_spi_cmd_t conf; in _psram_exec_cmd() local
140 conf.addr = &_addr; in _psram_exec_cmd()
141 conf.addrBitLen = addr_bit_len; in _psram_exec_cmd()
142 conf.cmd = cmd; in _psram_exec_cmd()
143 conf.cmdBitLen = cmd_bit_len; in _psram_exec_cmd()
144 conf.dummyBitLen = dummy_bits; // There is a hardware approach on chip723 in _psram_exec_cmd()
145 conf.txData = (uint32_t*) mosi_data; in _psram_exec_cmd()
146 conf.txDataBitLen = mosi_bit_len; in _psram_exec_cmd()
147 conf.rxData = (uint32_t*) miso_data; in _psram_exec_cmd()
148 conf.rxDataBitLen = miso_bit_len; in _psram_exec_cmd()
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