| /hal_espressif-latest/components/hal/esp32/include/hal/ |
| D | spi_ll.h | 575 reg.clk_equ_sysclk = 1; in spi_ll_master_cal_clock()
614 reg.clk_equ_sysclk = 0; in spi_ll_master_cal_clock()
|
| /hal_espressif-latest/components/soc/esp32c3/include/soc/ |
| D | spi_struct.h | 58 …uint32_t clk_equ_sysclk : 1; /*In the master mode 1: spi_clk is eqaul to system… member
|
| D | spi_mem_struct.h | 90 uint32_t clk_equ_sysclk: 1; /*Set this bit in 1-division mode.*/ member
|
| /hal_espressif-latest/components/hal/esp32s3/include/hal/ |
| D | spi_ll.h | 702 reg.clk_equ_sysclk = 1; in spi_ll_master_cal_clock()
741 reg.clk_equ_sysclk = 0; in spi_ll_master_cal_clock()
|
| /hal_espressif-latest/components/hal/esp32c6/include/hal/ |
| D | spi_ll.h | 692 reg.clk_equ_sysclk = 1; in spi_ll_master_cal_clock()
731 reg.clk_equ_sysclk = 0; in spi_ll_master_cal_clock()
|
| /hal_espressif-latest/components/hal/esp32c2/include/hal/ |
| D | spi_ll.h | 688 reg.clk_equ_sysclk = 1; in spi_ll_master_cal_clock()
727 reg.clk_equ_sysclk = 0; in spi_ll_master_cal_clock()
|
| /hal_espressif-latest/components/hal/esp32c3/include/hal/ |
| D | spi_ll.h | 688 reg.clk_equ_sysclk = 1; in spi_ll_master_cal_clock()
727 reg.clk_equ_sysclk = 0; in spi_ll_master_cal_clock()
|
| /hal_espressif-latest/components/hal/esp32h2/include/hal/ |
| D | spi_ll.h | 694 reg.clk_equ_sysclk = 1; in spi_ll_master_cal_clock()
733 reg.clk_equ_sysclk = 0; in spi_ll_master_cal_clock()
|
| /hal_espressif-latest/components/soc/esp32c2/include/soc/ |
| D | spi_struct.h | 61 …uint32_t clk_equ_sysclk : 1; /*In the master mode 1: spi_clk is eqaul to system… member
|
| D | spi_mem_struct.h | 91 uint32_t clk_equ_sysclk : 1; /*Set this bit in 1-division mode.*/ member
|
| /hal_espressif-latest/components/soc/esp32s3/include/soc/ |
| D | spi_struct.h | 69 …uint32_t clk_equ_sysclk : 1; /*In the master mode 1: spi_clk is eqaul to system… member
|
| D | spi_mem_struct.h | 103 …uint32_t clk_equ_sysclk : 1; /*When SPI0 accesses flash, set this bit in 1-divi… member
|
| /hal_espressif-latest/components/hal/esp32s2/include/hal/ |
| D | spi_ll.h | 650 reg.clk_equ_sysclk = 1; in spi_ll_master_cal_clock()
689 reg.clk_equ_sysclk = 0; in spi_ll_master_cal_clock()
|
| /hal_espressif-latest/components/soc/esp32c6/include/soc/ |
| D | spi_struct.h | 630 uint32_t clk_equ_sysclk:1; member
|
| D | spi_mem_struct.h | 109 …uint32_t clk_equ_sysclk : 1; /*1: 1-division mode, the frequency of SPI bus clo… member
|
| /hal_espressif-latest/components/soc/esp32h2/include/soc/ |
| D | spi_struct.h | 630 uint32_t clk_equ_sysclk:1; member
|
| D | spi_mem_struct.h | 110 …uint32_t clk_equ_sysclk : 1; /*1: 1-division mode, the frequency of SPI bus clo… member
|
| /hal_espressif-latest/components/soc/esp32/include/soc/ |
| D | spi_struct.h | 105 …uint32_t clk_equ_sysclk: 1; /*In the master mode 1: spi_clk is eqaul to system… member
|
| /hal_espressif-latest/components/soc/esp32s2/include/soc/ |
| D | spi_mem_struct.h | 92 uint32_t clk_equ_sysclk: 1; /*reserved*/ member
|
| D | spi_struct.h | 81 …uint32_t clk_equ_sysclk: 1; /*In the master mode 1: spi_clk is eqaul to system 0… member
|
