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Searched refs:SPI_MEM_W0_REG (Results 1 – 13 of 13) sorted by relevance

/hal_espressif-latest/components/esp_rom/include/esp32s2/rom/
Dspi_flash.h62 #define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1)
/hal_espressif-latest/components/esp_rom/include/esp32c3/rom/
Dspi_flash.h26 #define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1)
/hal_espressif-latest/components/esp_rom/include/esp32c6/rom/
Dspi_flash.h26 #define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1)
/hal_espressif-latest/components/esp_rom/include/esp32h2/rom/
Dspi_flash.h26 #define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1)
/hal_espressif-latest/components/esp_rom/include/esp32s3/rom/
Dspi_flash.h56 #define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1)
/hal_espressif-latest/components/esp_rom/include/esp32c2/rom/
Dspi_flash.h26 #define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1)
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dmspi_timing_tuning_ll.h354 REG_WRITE(SPI_MEM_W0_REG(spi_num) + i*4, 0); in mspi_timing_ll_clear_fifo()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dspi_mem_reg.h631 #define SPI_MEM_W0_REG(i) (REG_SPI_MEM_BASE(i) + 0x58) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dspi_mem_reg.h643 #define SPI_MEM_W0_REG(i) (REG_SPI_MEM_BASE(i) + 0x058) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dspi_mem_reg.h885 #define SPI_MEM_W0_REG(i) (REG_SPI_MEM_BASE(i) + 0x058) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dspi_mem_reg.h894 #define SPI_MEM_W0_REG(i) (REG_SPI_MEM_BASE(i) + 0x58) macro
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dspi_mem_reg.h1053 #define SPI_MEM_W0_REG(i) (REG_SPI_MEM_BASE(i) + 0x58) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dspi_mem_reg.h1048 #define SPI_MEM_W0_REG(i) (REG_SPI_MEM_BASE(i) + 0x58) macro