Searched refs:SPI_MEM_SPI_SMEM_TIMING_CALI_REG (Results 1 – 5 of 5) sorted by relevance
121 REG_SET_BIT(SPI_MEM_SPI_SMEM_TIMING_CALI_REG(spi_num), SPI_MEM_SPI_SMEM_TIMING_CLK_ENA); in mspi_timinng_ll_enable_psram_hclk()321 … SET_PERI_REG_MASK(SPI_MEM_SPI_SMEM_TIMING_CALI_REG(spi_num), SPI_MEM_SPI_SMEM_TIMING_CALI_M); in mspi_timing_ll_set_octal_psram_extra_dummy()322 …SET_PERI_REG_BITS(SPI_MEM_SPI_SMEM_TIMING_CALI_REG(spi_num), SPI_MEM_SPI_SMEM_EXTRA_DUMMY_CYCLELEN… in mspi_timing_ll_set_octal_psram_extra_dummy()325 … CLEAR_PERI_REG_MASK(SPI_MEM_SPI_SMEM_TIMING_CALI_REG(spi_num), SPI_MEM_SPI_SMEM_TIMING_CALI_M); in mspi_timing_ll_set_octal_psram_extra_dummy()326 …SET_PERI_REG_BITS(SPI_MEM_SPI_SMEM_TIMING_CALI_REG(spi_num), SPI_MEM_SPI_SMEM_EXTRA_DUMMY_CYCLELEN… in mspi_timing_ll_set_octal_psram_extra_dummy()
1364 #define SPI_MEM_SPI_SMEM_TIMING_CALI_REG(i) (REG_SPI_MEM_BASE(i) + 0x0BC) macro
1414 #define SPI_MEM_SPI_SMEM_TIMING_CALI_REG(i) (REG_SPI_MEM_BASE(i) + 0xBC) macro
2665 #define SPI_MEM_SPI_SMEM_TIMING_CALI_REG(i) (REG_SPI_MEM_BASE(i) + 0x190) macro
2660 #define SPI_MEM_SPI_SMEM_TIMING_CALI_REG(i) (REG_SPI_MEM_BASE(i) + 0x190) macro
