Searched refs:RTC_CNTL_STATE0_REG (Results 1 – 15 of 15) sorted by relevance
| /hal_espressif-latest/components/hal/esp32/include/hal/ |
| D | rtc_cntl_ll.h | 62 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN); in rtc_cntl_ll_ulp_wakeup_enable()
88 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_cntl_ll_sleep_enable()
|
| /hal_espressif-latest/components/hal/esp32c2/include/hal/ |
| D | rtc_cntl_ll.h | 66 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_cntl_ll_sleep_enable()
|
| /hal_espressif-latest/components/hal/esp32c3/include/hal/ |
| D | rtc_cntl_ll.h | 72 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_cntl_ll_sleep_enable()
|
| /hal_espressif-latest/components/hal/esp32s2/include/hal/ |
| D | rtc_cntl_ll.h | 86 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_cntl_ll_sleep_enable()
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32c3/ |
| D | rtc_sleep.c | 266 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_sleep_start()
345 "r" (RTC_CNTL_STATE0_REG), // %5 in rtc_deep_sleep_start()
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32s2/ |
| D | rtc_sleep.c | 275 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_sleep_start()
355 "r" (RTC_CNTL_STATE0_REG), // %5 in rtc_deep_sleep_start()
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32/ |
| D | rtc_sleep.c | 258 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_sleep_start()
338 "r" (RTC_CNTL_STATE0_REG), // %6 in rtc_deep_sleep_start()
|
| /hal_espressif-latest/components/hal/esp32s3/include/hal/ |
| D | rtc_cntl_ll.h | 167 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_cntl_ll_sleep_enable()
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32c2/ |
| D | rtc_sleep.c | 215 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_sleep_start()
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32s3/ |
| D | rtc_sleep.c | 278 SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN); in rtc_sleep_start()
|
| /hal_espressif-latest/components/soc/esp32c2/include/soc/ |
| D | rtc_cntl_reg.h | 201 #define RTC_CNTL_STATE0_REG (DR_REG_RTCCNTL_BASE + 0x18) macro
|
| /hal_espressif-latest/components/soc/esp32/include/soc/ |
| D | rtc_cntl_reg.h | 259 #define RTC_CNTL_STATE0_REG (DR_REG_RTCCNTL_BASE + 0x18) macro
|
| /hal_espressif-latest/components/soc/esp32c3/include/soc/ |
| D | rtc_cntl_reg.h | 238 #define RTC_CNTL_STATE0_REG (DR_REG_RTCCNTL_BASE + 0x0018) macro
|
| /hal_espressif-latest/components/soc/esp32s2/include/soc/ |
| D | rtc_cntl_reg.h | 229 #define RTC_CNTL_STATE0_REG (DR_REG_RTCCNTL_BASE + 0x0018) macro
|
| /hal_espressif-latest/components/soc/esp32s3/include/soc/ |
| D | rtc_cntl_reg.h | 222 #define RTC_CNTL_STATE0_REG (DR_REG_RTCCNTL_BASE + 0x18) macro
|
