Searched refs:RTC_CNTL_PAD_HOLD_REG (Results 1 – 11 of 11) sorted by relevance
/hal_espressif-latest/components/hal/esp32s2/include/hal/ |
D | rtc_io_ll.h | 224 SET_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, rtc_io_desc[rtcio_num].hold_force); in rtcio_ll_force_hold_enable() 235 CLEAR_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, rtc_io_desc[rtcio_num].hold_force); in rtcio_ll_force_hold_disable()
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/hal_espressif-latest/components/hal/esp32s3/include/hal/ |
D | rtc_io_ll.h | 250 SET_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, rtc_io_desc[rtcio_num].hold_force); in rtcio_ll_force_hold_enable() 261 CLEAR_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, rtc_io_desc[rtcio_num].hold_force); in rtcio_ll_force_hold_disable()
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/hal_espressif-latest/components/hal/esp32c2/include/hal/ |
D | gpio_ll.h | 431 REG_SET_BIT(RTC_CNTL_PAD_HOLD_REG, BIT(gpio_num)); in gpio_ll_hold_en() 446 REG_CLR_BIT(RTC_CNTL_PAD_HOLD_REG, BIT(gpio_num)); in gpio_ll_hold_dis()
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/hal_espressif-latest/components/hal/esp32c3/include/hal/ |
D | gpio_ll.h | 454 REG_SET_BIT(RTC_CNTL_PAD_HOLD_REG, BIT(gpio_num)); in gpio_ll_hold_en() 469 REG_CLR_BIT(RTC_CNTL_PAD_HOLD_REG, BIT(gpio_num)); in gpio_ll_hold_dis()
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/hal_espressif-latest/components/esp_hw_support/port/esp32c2/ |
D | rtc_clk.c | 38 REG_SET_BIT(RTC_CNTL_PAD_HOLD_REG, BIT(EXT_OSC_SLOW_GPIO_NUM)); in rtc_clk_32k_enable_external()
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/hal_espressif-latest/components/esp_hw_support/port/esp32c3/ |
D | rtc_clk.c | 54 SET_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, RTC_CNTL_GPIO_PIN0_HOLD); in rtc_clk_32k_enable_external()
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/hal_espressif-latest/components/esp_hw_support/port/esp32s3/ |
D | rtc_clk.c | 69 SET_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, RTC_CNTL_X32P_HOLD); in rtc_clk_32k_enable_external()
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/hal_espressif-latest/components/soc/esp32c2/include/soc/ |
D | rtc_cntl_reg.h | 1389 #define RTC_CNTL_PAD_HOLD_REG (DR_REG_RTCCNTL_BASE + 0xC4) macro
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/hal_espressif-latest/components/soc/esp32c3/include/soc/ |
D | rtc_cntl_reg.h | 2005 #define RTC_CNTL_PAD_HOLD_REG (DR_REG_RTCCNTL_BASE + 0x00D0) macro
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/hal_espressif-latest/components/soc/esp32s2/include/soc/ |
D | rtc_cntl_reg.h | 2491 #define RTC_CNTL_PAD_HOLD_REG (DR_REG_RTCCNTL_BASE + 0x00D4) macro
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/hal_espressif-latest/components/soc/esp32s3/include/soc/ |
D | rtc_cntl_reg.h | 2399 #define RTC_CNTL_PAD_HOLD_REG (DR_REG_RTCCNTL_BASE + 0xD8) macro
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