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Searched refs:RTC_CNTL_DIG_ISO_REG (Results 1 – 23 of 23) sorted by relevance

/hal_espressif-latest/components/esp_hw_support/port/esp32c3/
Drtc_init.c43 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in rtc_init()
141 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_WRAP_FORCE_NOISO); in rtc_init()
142 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO); in rtc_init()
143 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_NOISO); in rtc_init()
144 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CPU_TOP_FORCE_NOISO); in rtc_init()
145 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PERI_FORCE_NOISO); in rtc_init()
153 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in rtc_init()
154 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_NOISO); in rtc_init()
157 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in rtc_init()
160 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in rtc_init()
Drtc_sleep.c177 REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO); in rtc_sleep_init()
184 REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_NOISO); in rtc_sleep_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32/
Drtc_init.c31 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in rtc_init()
96 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_WRAP_FORCE_NOISO); in rtc_init()
97 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO); in rtc_init()
98 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CPU_ROM_RAM_FORCE_NOISO); in rtc_init()
102 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in rtc_init()
103 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_NOISO); in rtc_init()
106 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in rtc_init()
Drtc_sleep.c186 REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO); in rtc_sleep_init()
200 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, in rtc_sleep_init()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dgpio_ll.h443 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_deep_sleep_hold_en()
444 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_en()
454 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_dis()
469 …return !GET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD) && GET_PERI_REG_MASK… in gpio_ll_deep_sleep_hold_is_en()
579 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_force_hold_all()
580 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD); in gpio_ll_force_hold_all()
589 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD); in gpio_ll_force_unhold_all()
590 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_force_unhold_all()
591 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CLR_DG_PAD_AUTOHOLD); in gpio_ll_force_unhold_all()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dgpio_ll.h393 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_deep_sleep_hold_en()
394 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_en()
404 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_dis()
419 …return !GET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD) && GET_PERI_REG_MASK… in gpio_ll_deep_sleep_hold_is_en()
534 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_force_hold_all()
535 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD); in gpio_ll_force_hold_all()
545 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD); in gpio_ll_force_unhold_all()
546 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_force_unhold_all()
547 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CLR_DG_PAD_AUTOHOLD); in gpio_ll_force_unhold_all()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dgpio_ll.h417 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_deep_sleep_hold_en()
418 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_en()
428 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_dis()
443 …return !GET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD) && GET_PERI_REG_MASK… in gpio_ll_deep_sleep_hold_is_en()
550 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_force_hold_all()
551 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD); in gpio_ll_force_hold_all()
560 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD); in gpio_ll_force_unhold_all()
561 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_force_unhold_all()
562 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CLR_DG_PAD_AUTOHOLD); in gpio_ll_force_unhold_all()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dgpio_ll.h416 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_deep_sleep_hold_en()
417 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_en()
427 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_dis()
442 …return !GET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD) && GET_PERI_REG_MASK… in gpio_ll_deep_sleep_hold_is_en()
561 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_force_hold_all()
562 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD); in gpio_ll_force_hold_all()
572 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_HOLD); in gpio_ll_force_unhold_all()
573 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_force_unhold_all()
574 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CLR_DG_PAD_AUTOHOLD); in gpio_ll_force_unhold_all()
/hal_espressif-latest/components/esp_hw_support/port/esp32s3/
Drtc_init.c57 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in rtc_init()
173 … REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_WRAP_FORCE_NOISO | RTC_CNTL_DG_WRAP_FORCE_ISO); in rtc_init()
175 REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO | RTC_CNTL_WIFI_FORCE_ISO); in rtc_init()
178 REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_NOISO | RTC_CNTL_BT_FORCE_ISO); in rtc_init()
181 … REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CPU_TOP_FORCE_NOISO | RTC_CNTL_CPU_TOP_FORCE_ISO); in rtc_init()
184 … REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PERI_FORCE_NOISO | RTC_CNTL_DG_PERI_FORCE_ISO); in rtc_init()
198 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in rtc_init()
199 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_NOISO); in rtc_init()
202 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in rtc_init()
Drtc_sleep.c181 REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO); in rtc_sleep_init()
189 … REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CPU_TOP_FORCE_NOISO | RTC_CNTL_CPU_TOP_FORCE_ISO); in rtc_sleep_init()
197 … REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PERI_FORCE_NOISO | RTC_CNTL_DG_PERI_FORCE_ISO); in rtc_sleep_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Drtc_init.c40 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in rtc_init()
146 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_WRAP_FORCE_NOISO); in rtc_init()
147 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO); in rtc_init()
158 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in rtc_init()
159 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_NOISO); in rtc_init()
162 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in rtc_init()
Drtc_sleep.c204 REG_CLR_BIT(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_NOISO); in rtc_sleep_init()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dgpio_ll.h573 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in gpio_ll_deep_sleep_hold_en()
574 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_en()
584 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); in gpio_ll_deep_sleep_hold_dis()
599 …return !GET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD) && GET_PERI_REG_MASK… in gpio_ll_deep_sleep_hold_is_en()
/hal_espressif-latest/components/esp_hw_support/port/esp32c2/
Drtc_init.c110 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_WRAP_FORCE_NOISO); in rtc_init()
119 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD); in rtc_init()
120 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_NOISO); in rtc_init()
/hal_espressif-latest/zephyr/esp32c3/src/bt/
Desp_bt_adapter.c391 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in btdm_hw_mac_power_down_wrapper()
404 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in btdm_hw_mac_power_up_wrapper()
422 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in esp_bt_power_domain_on()
431 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in esp_bt_power_domain_off()
/hal_espressif-latest/zephyr/esp32s3/src/bt/
Desp_bt_adapter.c389 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in btdm_hw_mac_power_down_wrapper()
402 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in btdm_hw_mac_power_up_wrapper()
420 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in esp_bt_power_domain_on()
429 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in esp_bt_power_domain_off()
/hal_espressif-latest/components/bt/controller/esp32c3/
Dbt.c444 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in btdm_hw_mac_power_down_wrapper()
457 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in btdm_hw_mac_power_up_wrapper()
475 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in esp_bt_power_domain_on()
484 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO); in esp_bt_power_domain_off()
/hal_espressif-latest/components/esp_phy/src/
Dphy_init.c409 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in esp_wifi_bt_power_domain_on()
423 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); in esp_wifi_bt_power_domain_off()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Drtc_cntl_reg.h956 #define RTC_CNTL_DIG_ISO_REG (DR_REG_RTCCNTL_BASE + 0x80) macro
/hal_espressif-latest/components/soc/esp32/include/soc/
Drtc_cntl_reg.h1466 #define RTC_CNTL_DIG_ISO_REG (DR_REG_RTCCNTL_BASE + 0x88) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Drtc_cntl_reg.h1471 #define RTC_CNTL_DIG_ISO_REG (DR_REG_RTCCNTL_BASE + 0x008C) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Drtc_cntl_reg.h1922 #define RTC_CNTL_DIG_ISO_REG (DR_REG_RTCCNTL_BASE + 0x0090) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Drtc_cntl_reg.h1872 #define RTC_CNTL_DIG_ISO_REG (DR_REG_RTCCNTL_BASE + 0x94) macro