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Searched refs:RSA_CLEAR_INTERRUPT_REG (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-latest/components/soc/esp32/include/soc/
Dhwcrypto_reg.h33 #define RSA_CLEAR_INTERRUPT_REG (DR_REG_RSA_BASE + 0x814) macro
40 #define RSA_INTERRUPT_REG (RSA_CLEAR_INTERRUPT_REG)
/hal_espressif-latest/components/mbedtls/port/esp32s2/
Dbignum.c58 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in esp_mpi_interrupt_clear()
106 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in start_op()
122 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in wait_op_complete()
/hal_espressif-latest/components/mbedtls/port/esp32s3/
Dbignum.c60 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in esp_mpi_interrupt_clear()
108 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in start_op()
124 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in wait_op_complete()
/hal_espressif-latest/components/mbedtls/port/esp32c3/
Dbignum.c60 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in esp_mpi_interrupt_clear()
111 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in start_op()
127 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in wait_op_complete()
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dhwcrypto_reg.h36 #define RSA_CLEAR_INTERRUPT_REG (DR_REG_RSA_BASE + 0x81C) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dhwcrypto_reg.h37 #define RSA_CLEAR_INTERRUPT_REG (DR_REG_RSA_BASE + 0x81C) macro
/hal_espressif-latest/components/mbedtls/port/esp32/
Dbignum.c61 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in esp_mpi_interrupt_clear()
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dhwcrypto_reg.h37 #define RSA_CLEAR_INTERRUPT_REG (DR_REG_RSA_BASE + 0x81C) macro