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Searched refs:IO_MUX_GPIO0_REG (Results 1 – 24 of 24) sorted by relevance

/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dgpio_ll.h82 REG_SET_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PU); in gpio_ll_pullup_en()
103 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PU); in gpio_ll_pullup_dis()
114 REG_SET_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PD); in gpio_ll_pulldown_en()
126 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PD); in gpio_ll_pulldown_dis()
227 PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_disable()
238 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_enable()
249 PIN_FILTER_EN(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_enable()
260 PIN_FILTER_DIS(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_disable()
376 SET_PERI_REG_BITS(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_DRV_V, strength, FUN_DRV_S); in gpio_ll_set_drive_capability()
388 …*strength = (gpio_drive_cap_t)GET_PERI_REG_BITS2(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_DRV_V, FUN… in gpio_ll_get_drive_capability()
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/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dgpio_ll.h81 REG_SET_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PU); in gpio_ll_pullup_en()
102 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PU); in gpio_ll_pullup_dis()
113 REG_SET_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PD); in gpio_ll_pulldown_en()
125 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PD); in gpio_ll_pulldown_dis()
226 PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_disable()
237 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_enable()
248 PIN_FILTER_EN(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_enable()
259 PIN_FILTER_DIS(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_disable()
270 PIN_HYS_EN_SEL_EFUSE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_input_hysteresis_ctrl_sel_efuse()
281 PIN_HYS_EN_SEL_SOFT(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_input_hysteresis_ctrl_sel_soft()
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/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dgpio_ll.h99 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PU); in gpio_ll_pullup_dis()
122 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PD); in gpio_ll_pulldown_dis()
226 PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_disable()
237 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_enable()
248 PIN_FILTER_EN(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_enable()
259 PIN_FILTER_DIS(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_disable()
331 PIN_FUNC_SELECT(IO_MUX_GPIO0_REG + (gpio_num * 4), func); in gpio_ll_func_sel()
416 SET_PERI_REG_BITS(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_DRV_V, drv_cap, FUN_DRV_S); in gpio_ll_set_drive_capability()
428 uint32_t drv_cap = GET_PERI_REG_BITS2(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_DRV_V, FUN_DRV_S); in gpio_ll_get_drive_capability()
523 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio * 4)); in gpio_ll_iomux_in()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dgpio_ll.h96 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PU); in gpio_ll_pullup_dis()
119 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PD); in gpio_ll_pulldown_dis()
219 PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_disable()
230 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_enable()
241 PIN_FILTER_EN(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_enable()
252 PIN_FILTER_DIS(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_disable()
316 PIN_FUNC_SELECT(IO_MUX_GPIO0_REG + (gpio_num * 4), func); in gpio_ll_func_sel()
389 SET_PERI_REG_BITS(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_DRV_V, drv_cap, FUN_DRV_S); in gpio_ll_set_drive_capability()
401 uint32_t drv_cap = GET_PERI_REG_BITS2(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_DRV_V, FUN_DRV_S); in gpio_ll_get_drive_capability()
504 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio * 4)); in gpio_ll_iomux_in()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dgpio_ll.h87 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PU); in gpio_ll_pullup_dis()
110 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PD); in gpio_ll_pulldown_dis()
210 PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_disable()
221 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_enable()
232 PIN_FILTER_EN(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_enable()
243 PIN_FILTER_DIS(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_disable()
303 PIN_FUNC_SELECT(IO_MUX_GPIO0_REG + (gpio_num * 4), func); in gpio_ll_func_sel()
481 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio * 4)); in gpio_ll_iomux_in()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dgpio_ll.h90 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PU); in gpio_ll_pullup_dis()
113 REG_CLR_BIT(IO_MUX_GPIO0_REG + (gpio_num * 4), FUN_PD); in gpio_ll_pulldown_dis()
213 PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_disable()
224 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_input_enable()
235 PIN_FILTER_EN(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_enable()
246 PIN_FILTER_DIS(IO_MUX_GPIO0_REG + (gpio_num * 4)); in gpio_ll_pin_filter_disable()
315 PIN_FUNC_SELECT(IO_MUX_GPIO0_REG + (gpio_num * 4), func); in gpio_ll_func_sel()
497 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio * 4)); in gpio_ll_iomux_in()
/hal_espressif-latest/components/soc/esp32c2/
Dgpio_periph.c10 IO_MUX_GPIO0_REG,
/hal_espressif-latest/components/soc/esp32c3/
Dgpio_periph.c10 IO_MUX_GPIO0_REG,
/hal_espressif-latest/components/soc/esp32/
Dgpio_periph.c11 IO_MUX_GPIO0_REG,
/hal_espressif-latest/components/soc/esp32h2/
Dgpio_periph.c10 IO_MUX_GPIO0_REG,
/hal_espressif-latest/components/soc/esp32c6/
Dgpio_periph.c10 IO_MUX_GPIO0_REG,
/hal_espressif-latest/components/soc/esp32s2/
Dgpio_periph.c10 IO_MUX_GPIO0_REG,
/hal_espressif-latest/components/soc/esp32s3/
Dgpio_periph.c10 IO_MUX_GPIO0_REG,
/hal_espressif-latest/components/esp_hw_support/port/esp32c2/
Drtc_clk.c37 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG); in rtc_clk_32k_enable_external()
/hal_espressif-latest/components/esp_hw_support/port/esp32c3/
Drtc_clk.c53 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG); in rtc_clk_32k_enable_external()
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dio_mux_reg.h96 #define IO_MUX_GPIO0_REG PERIPHS_IO_MUX_XTAL_32K_P_U macro
/hal_espressif-latest/components/esp_hw_support/port/esp32c6/
Drtc_clk.c59 PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG); in rtc_clk_32k_enable_external()
/hal_espressif-latest/components/hal/include/hal/
Dgpio_types.h22 #define GPIO_PIN_REG_0 IO_MUX_GPIO0_REG
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dio_mux_reg.h97 #define IO_MUX_GPIO0_REG PERIPHS_IO_MUX_XTAL_32K_P_U macro
/hal_espressif-latest/components/soc/esp32/include/soc/
Dio_mux_reg.h111 #define IO_MUX_GPIO0_REG PERIPHS_IO_MUX_GPIO0_U macro
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dio_mux_reg.h94 #define IO_MUX_GPIO0_REG PERIPHS_IO_MUX_XTAL_32K_P_U macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dio_mux_reg.h116 #define IO_MUX_GPIO0_REG PERIPHS_IO_MUX_GPIO0_U macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dio_mux_reg.h94 #define IO_MUX_GPIO0_REG PERIPHS_IO_MUX_GPIO0_U macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dio_mux_reg.h95 #define IO_MUX_GPIO0_REG PERIPHS_IO_MUX_GPIO0_U macro