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/hal_espressif-latest/components/log/include/
Desp_log.h302 #define ESP_EARLY_LOGI( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_INFO, I __VA_…
312 #define ESP_EARLY_LOGI( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_INFO, I, ##__…
396 …else { esp_log_write(ESP_LOG_INFO, tag, LOG_FORMAT(I, format)…
404 … { esp_log_write(ESP_LOG_INFO, tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_sy…
414 …else { esp_log_write(ESP_LOG_INFO, tag, LOG_FORMAT(I, format)…
422 … { esp_log_write(ESP_LOG_INFO, tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_sy…
457 #define ESP_DRAM_LOGI( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_INFO, I __VA_OP…
467 #define ESP_DRAM_LOGI( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_INFO, I, ##__VA…
/hal_espressif-latest/tools/esptool_py/docs/en/advanced-topics/
Dspi-flash-modes.rst8 These options control how many I/O pins are used for communication with the attached SPI flash chip…
20 | ``qio`` | Quad I/O | 4 pins used for address & data | Fastest. …
24 | ``dio`` | Dual I/O | 2 pins used for address & data | Approx 45% slower than ``qio``. …
58 In ``dio`` mode, the host uses the "Dual I/O Fast Read" (BBH) command to read data. Each read comma…
74 …`qio`` mode, the host uses the "Quad I/O Fast Read" (EBH) command to read data. This command is th…
75 This makes both the address & data transfer exactly twice as fast as "Dual I/O Fast Read".
94 …tput Fast Read" and/or "Quad Output Fast Read" commands, not their Dual I/O & Quad I/O equivalents.
102 …y on your board/module. An 80MHz SPI clock in Dual I/O mode is faster than a 40MHz SPI clock in Qu…
Dboot-mode-selection.rst343 …a Quad I/O mode the ROM bootloader should load the software bootloader in a Dual I/O mode and then…
/hal_espressif-latest/components/esp_system/ld/
Dld.cmake25 COMMAND "${CMAKE_C_COMPILER}" -C -P -x c -E -o ${ld_output} -I ${config_dir}
26 -I "${CMAKE_CURRENT_LIST_DIR}" ${ld_input}
/hal_espressif-latest/components/wpa_supplicant/src/tls/
Dpkcs5.c405 u8 *D = NULL, *I = NULL, *B = NULL, *pos; in pkcs12_key_gen() local
421 I = os_malloc(S_len + P_len); in pkcs12_key_gen()
422 if (!I) in pkcs12_key_gen()
424 pos = I; in pkcs12_key_gen()
445 addr[1] = I; in pkcs12_key_gen()
473 add_byte_array_mod(&I[i], B, v); in pkcs12_key_gen()
478 os_free(I); in pkcs12_key_gen()
/hal_espressif-latest/tools/esptool_py/test/secure_images/
Decdsa384_secure_boot_signing_key2.pem4 PEbHAazkDNvziUUeI+CkF/M17chj7YyOFFdAJN+I+Qn38bS/yZiYVzOocGXeLWhZks3+wME=
/hal_espressif-latest/components/esp_phy/
DCMakeLists.txt106 -I ${esp_common_dir}/include -I ${CMAKE_CURRENT_LIST_DIR}/include -I ${config_dir}
/hal_espressif-latest/components/esp_hw_support/include/
Desp_wake_stub.h25 #define ESP_RTC_LOGI( format, ... ) ESP_RTC_LOG(ESP_LOG_INFO, RTC_LOG_FORMAT(I, format), ##__VA_AR…
/hal_espressif-latest/tools/esptool_py/docs/en/esptool/
Dflash-modes.rst29 These set Quad Flash I/O or Dual Flash I/O modes. Valid values are ``keep``, ``qio``, ``qout``, ``d…
33 …s, including the ESP-12E modules on some (not all) NodeMCU boards, are dual I/O and the firmware w…
37 Most {IDF_TARGET_NAME} modules use ``qio``, but are also dual I/O.
/hal_espressif-latest/components/spi_flash/sim/stubs/log/include/
Desp_log.h55 …_LEVEL >= ESP_LOG_INFO) { esp_log_write(ESP_LOG_INFO, tag, LOG_FORMAT(I, format), esp_log_ti…
/hal_espressif-latest/components/esp_rom/esp32/ld/
Desp32.rom.syscalls.ld6 I.e.:
/hal_espressif-latest/tools/esptool_py/docs/en/
Dtroubleshooting.rst88 If you set "Quad I/O" mode (``-fm qio``, the esptool default) then GPIOs 7, 8, 9 & 10 are used for …
90 If you set "Dual I/O" mode (``-fm dio``) then GPIOs 7 & 8 are used for reading the SPI flash and mu…
92 …I/O mode if you were previously using Quad I/O mode but want to attach things to GPIOs 9 & 10). No…
/hal_espressif-latest/components/bt/esp_ble_mesh/mesh_common/include/
Dmesh_trace.h66 #define BLE_MESH_PRINT_I(tag, format, ...) {esp_log_write(ESP_LOG_INFO, tag, LOG_FORMAT(I, form…
/hal_espressif-latest/components/esp_pm/
DKconfig105 bool "Power down I/D-cache tag memory in light sleep"
109 … If enabled, the I/D-cache tag memory will be retained in light sleep. Depending on the the
/hal_espressif-latest/components/bt/common/include/
Dbt_common.h136 #define BT_PRINT_I(tag, format, ...) {esp_log_write(ESP_LOG_INFO, tag, LOG_FORMAT(I, format), …
/hal_espressif-latest/tools/esptool_py/docs/en/espefuse/
Dburn-efuse-cmd.rst97 …33 is 30, 31 (this is visible in the summary output if these pins are configured for any SPI I/Os.)
/hal_espressif-latest/components/esp_system/ld/esp32s3/
Dmemory.ld.in18 * 40370000 <- IRAM/Icache -> 40378000 <- D/IRAM (I) -> 403E0000
/hal_espressif-latest/components/mbedtls/esp_crt_bundle/
Dcacrt_all.pem644 lgeLKBObjBmNQSdJQO7e5iNEOdyhIta6A/I=
665 I/OMn74dseGkddug4lQUsbocKaQY9hK6ohQU4zE1yED/t+AFdlfBHFny+L/k7SViXITwfn4fs775
1107 X5GOZpIJhzbNi5stPvZR1FDUWSi9g/LMKHtThm3YJohw1+qRzT65ysCQblrGXnRl11z+o+I=
1243 3GV17CpNX8GH9SBlK4GoRz6JI5UwFpB/6FcHSOcZrr9FZ7E3GwYq/t75rH2D+1665I+XZ75Ljo1k
1500 YwwX7Adw9c+ELkCDnOg/QW07rdOkFFk2eJ0DQ+4QE2xy3q6Ip6FrtUPOZ9wj/wMco+I+o0IwQDAP
2646 I/hGoiLtk/bdmuYqh7GYVPEi92tF4+KOdh2ajcQGjTa3FPOdVGm3jjzVpG2Tgbet9r1ke8LJaDmg
2732 iuOTe8aPmxadJ2W8esVCgmxcB9CpwYhgROmYhRZf+I/KARDOJcP5YBugxZfD0yyIMaK9MOzQ0MAS
/hal_espressif-latest/components/bootloader_support/bootloader_flash/src/
Dbootloader_flash.c705 BOOTLOADER_FLASH_LOG(I, "XM25QHxxC startup flow"); in bootloader_flash_xmc_startup()
/hal_espressif-latest/zephyr/port/bootloader/
Dbootloader_flash.c693 BOOTLOADER_FLASH_LOG(I, "XM25QHxxC startup flow"); in bootloader_flash_xmc_startup()
/hal_espressif-latest/components/esp_psram/esp32/
DKconfig.spiram143 bool "Put libc's I/O related functions in IRAM"
360 …When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
/hal_espressif-latest/components/bt/host/bluedroid/common/include/common/
Dbt_trace.h214 …EL >= ESP_LOG_INFO) esp_log_write(ESP_LOG_INFO, "BT_LOG", LOG_FORMAT(I, format), esp_log_ti…
/hal_espressif-latest/components/bootloader/
DKconfig.projbuild75 …When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka