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Searched refs:GDMA_INLINK_DSCR_ADDR_CH0_M (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dgdma_reg.h666 #define GDMA_INLINK_DSCR_ADDR_CH0_M (GDMA_INLINK_DSCR_ADDR_CH0_V << GDMA_INLINK_DSCR_ADDR_CH0_S) macro
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dgdma_reg.h1541 #define GDMA_INLINK_DSCR_ADDR_CH0_M (GDMA_INLINK_DSCR_ADDR_CH0_V << GDMA_INLINK_DSCR_ADDR_CH0_S) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dgdma_reg.h1541 #define GDMA_INLINK_DSCR_ADDR_CH0_M (GDMA_INLINK_DSCR_ADDR_CH0_V << GDMA_INLINK_DSCR_ADDR_CH0_S) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dgdma_reg.h492 #define GDMA_INLINK_DSCR_ADDR_CH0_M ((GDMA_INLINK_DSCR_ADDR_CH0_V)<<(GDMA_INLINK_DSCR_ADDR_CH0_S)) macro