Searched refs:FE_GEN_CTRL (Results 1 – 10 of 10) sorted by relevance
| /hal_espressif-latest/components/soc/esp32c2/include/soc/ |
| D | fe_reg.h | 15 #define FE_GEN_CTRL (DR_REG_FE_BASE + 0x0090) macro
|
| /hal_espressif-latest/components/soc/esp32s3/include/soc/ |
| D | fe_reg.h | 23 #define FE_GEN_CTRL (DR_REG_FE_BASE + 0x0090) macro
|
| /hal_espressif-latest/components/soc/esp32/include/soc/ |
| D | fe_reg.h | 23 #define FE_GEN_CTRL (DR_REG_FE_BASE + 0x0090) macro
|
| /hal_espressif-latest/components/soc/esp32s2/include/soc/ |
| D | fe_reg.h | 23 #define FE_GEN_CTRL (DR_REG_FE_BASE + 0x0090) macro
|
| /hal_espressif-latest/components/soc/esp32c3/include/soc/ |
| D | fe_reg.h | 23 #define FE_GEN_CTRL (DR_REG_FE_BASE + 0x0090) macro
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32c2/ |
| D | rtc_sleep.c | 42 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32c3/ |
| D | rtc_sleep.c | 49 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32s3/ |
| D | rtc_sleep.c | 43 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32s2/ |
| D | rtc_sleep.c | 42 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
|
| /hal_espressif-latest/components/esp_hw_support/port/esp32/ |
| D | rtc_sleep.c | 81 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, ~cfg.fe_pd); in rtc_sleep_pd()
|
