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Searched refs:ENTER_CRITICAL_SECTION (Results 1 – 13 of 13) sorted by relevance

/hal_espressif-latest/components/esp_hw_support/
Dperiph_ctrl.c19 #define ENTER_CRITICAL_SECTION() do { periph_spinlock = irq_lock(); } while(0) macro
27 ENTER_CRITICAL_SECTION(); in periph_module_enable()
38 ENTER_CRITICAL_SECTION(); in periph_module_disable()
49 ENTER_CRITICAL_SECTION(); in periph_module_reset()
60 ENTER_CRITICAL_SECTION(); in wifi_bt_common_module_enable()
74 ENTER_CRITICAL_SECTION(); in wifi_bt_common_module_disable()
90 ENTER_CRITICAL_SECTION(); in wifi_module_enable()
101 ENTER_CRITICAL_SECTION(); in wifi_module_disable()
Dclk_ctrl_os.c16 #define ENTER_CRITICAL_SECTION() do { periph_spinlock = irq_lock(); } while(0) macro
31 ENTER_CRITICAL_SECTION(); in periph_rtc_dig_clk8m_enable()
60 ENTER_CRITICAL_SECTION(); in periph_rtc_dig_clk8m_disable()
73 ENTER_CRITICAL_SECTION(); in periph_rtc_apll_acquire()
84 ENTER_CRITICAL_SECTION(); in periph_rtc_apll_release()
107 ENTER_CRITICAL_SECTION(); in periph_rtc_apll_freq_set()
Dregi2c_ctrl.c18 #define ENTER_CRITICAL_SECTION() do { mux = irq_lock(); } while(0) macro
26 ENTER_CRITICAL_SECTION(); in regi2c_ctrl_read_reg()
34 ENTER_CRITICAL_SECTION(); in regi2c_ctrl_read_reg_mask()
42 ENTER_CRITICAL_SECTION(); in regi2c_ctrl_write_reg()
49 ENTER_CRITICAL_SECTION(); in regi2c_ctrl_write_reg_mask()
57 ENTER_CRITICAL_SECTION(); in regi2c_enter_critical()
Desp_clk.c52 #define ENTER_CRITICAL_SECTION() do { s_esp_rtc_time_lock = irq_lock(); } while(0) macro
111 ENTER_CRITICAL_SECTION(); in esp_rtc_get_time_us()
172 ENTER_CRITICAL_SECTION(); in esp_clk_slowclk_cal_set()
217 ENTER_CRITICAL_SECTION(); in esp_clk_private_lock()
/hal_espressif-latest/components/esp_hw_support/port/esp32c3/
Dsar_periph_ctrl.c30 #define ENTER_CRITICAL_SECTION() do { rtc_spinlock = irq_lock(); } while(0) macro
44 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_enable()
51 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_disable()
64 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_pwdet_power_acquire()
74 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_pwdet_power_release()
95 ENTER_CRITICAL_SECTION(); in s_sar_adc_power_acquire()
105 ENTER_CRITICAL_SECTION(); in s_sar_adc_power_release()
Dadc2_init_cal.c19 #define ENTER_CRITICAL_SECTION() do { rtc_spinlock = irq_lock(); } while(0) macro
30 ENTER_CRITICAL_SECTION(); in adc2_init_code_calibration()
/hal_espressif-latest/components/esp_hw_support/port/esp32c2/
Dsar_periph_ctrl.c30 #define ENTER_CRITICAL_SECTION() do { rtc_spinlock = irq_lock(); } while(0) macro
44 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_enable()
51 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_disable()
64 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_pwdet_power_acquire()
74 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_pwdet_power_release()
95 ENTER_CRITICAL_SECTION(); in s_sar_adc_power_acquire()
105 ENTER_CRITICAL_SECTION(); in s_sar_adc_power_release()
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Dsar_periph_ctrl.c30 #define ENTER_CRITICAL_SECTION() do { rtc_spinlock = irq_lock(); } while(0) macro
44 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_enable()
51 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_disable()
64 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_pwdet_power_acquire()
74 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_pwdet_power_release()
Dadc2_init_cal.c19 #define ENTER_CRITICAL_SECTION() do { rtc_spinlock = irq_lock(); } while(0) macro
30 ENTER_CRITICAL_SECTION(); in adc2_init_code_calibration()
/hal_espressif-latest/components/esp_hw_support/port/esp32c6/
Dsar_periph_ctrl.c29 #define ENTER_CRITICAL_SECTION() do { rtc_spinlock = irq_lock(); } while(0) macro
42 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_enable()
49 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_disable()
65 ENTER_CRITICAL_SECTION(); in s_sar_power_acquire()
75 ENTER_CRITICAL_SECTION(); in s_sar_power_release()
/hal_espressif-latest/components/esp_hw_support/port/esp32h2/
Dsar_periph_ctrl.c28 #define ENTER_CRITICAL_SECTION() do { rtc_spinlock = irq_lock(); } while(0) macro
41 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_enable()
48 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_disable()
64 ENTER_CRITICAL_SECTION(); in s_sar_power_acquire()
74 ENTER_CRITICAL_SECTION(); in s_sar_power_release()
/hal_espressif-latest/components/esp_hw_support/port/esp32s3/
Dsar_periph_ctrl.c30 #define ENTER_CRITICAL_SECTION() do { rtc_spinlock = irq_lock(); } while(0) macro
44 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_enable()
51 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_disable()
66 ENTER_CRITICAL_SECTION(); in s_sar_power_acquire()
76 ENTER_CRITICAL_SECTION(); in s_sar_power_release()
/hal_espressif-latest/components/esp_hw_support/port/esp32/
Dsar_periph_ctrl.c28 #define ENTER_CRITICAL_SECTION() do { rtc_spinlock = irq_lock(); } while(0) macro
42 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_enable()
49 ENTER_CRITICAL_SECTION(); in sar_periph_ctrl_power_disable()
64 ENTER_CRITICAL_SECTION(); in s_sar_power_acquire()
74 ENTER_CRITICAL_SECTION(); in s_sar_power_release()