Home
last modified time | relevance | path

Searched refs:shared (Results 1 – 25 of 290) sorted by relevance

12345678910>>...12

/Zephyr-latest/drivers/gpio/
Dgpio_lpc11u6x.c93 const struct gpio_lpc11u6x_shared *shared; member
110 (config->shared->gpio_base + LPC11U6X_GPIO_REGS); in gpio_lpc11u6x_pin_configure()
191 (config->shared->gpio_base + LPC11U6X_GPIO_REGS); in gpio_lpc11u6x_port_get_raw()
204 (config->shared->gpio_base + LPC11U6X_GPIO_REGS); in gpio_lpc11u6x_port_set_masked_raw()
227 (config->shared->gpio_base + LPC11U6X_GPIO_REGS); in gpio_lpc11u6x_port_set_bits_raw()
239 (config->shared->gpio_base + LPC11U6X_GPIO_REGS); in gpio_lpc11u6x_port_clear_bits_raw()
251 (config->shared->gpio_base + LPC11U6X_GPIO_REGS); in gpio_lpc11u6x_port_toggle_bits()
269 pintsel_attach(const struct gpio_lpc11u6x_shared *shared, uint8_t intpin) in pintsel_attach() argument
274 (uint32_t *) (shared->syscon_base + LPC11U6X_PINTSEL_REGS); in pintsel_attach()
276 for (irq = 0; irq < shared->nirqs; irq++) { in pintsel_attach()
[all …]
/Zephyr-latest/boards/nxp/mimxrt1010_evk/
Dmimxrt1010_evk.dts62 <4 0 &gpio1 15 0>, /* A4 (shared with D6) */
63 <5 0 &gpio1 16 0>, /* A5 (shared with D7) */
66 <8 0 &gpio1 19 0>, /* D2 (shared with D10) */
67 <9 0 &gpio1 20 0>, /* D3 (shared with D13) */
69 /* R793 not populated, D5 (shared with D14) */
70 <12 0 &gpio1 15 0>, /* D6 (shared with A4) */
71 <13 0 &gpio1 16 0>, /* D7 (shared with A5) */
74 <16 0 &gpio1 19 0>, /* D10 (shared with D2) */
77 <19 0 &gpio1 20 0>, /* D13 (shared with D3) */
/Zephyr-latest/soc/adi/max32/
Dmax78002.ld7 SECTION_PROLOGUE(.shared,, SUBALIGN(4))
11 *(.shared*)
/Zephyr-latest/drivers/firmware/scmi/
DKconfig14 bool "SCMI transport based on shared memory and doorbells"
20 Enable support for SCMI transport based on shared memory
32 bool "SCMI shared memory (SHMEM) driver"
36 Enable support for SCMI shared memory (SHMEM) driver.
39 int "SCMI shared memory (SHMEM) initialization priority"
/Zephyr-latest/samples/drivers/virtualization/ivshmem/doorbell/
DREADME.rst68 The ivshmem shared memory can be manipulated to crash QEMU and bring down
74 to use the default shared memory size of ivshmem (4MB) for this platform.
79 shared memory size are decided at run-time (when the server is executed).
80 For Zephyr, the number of vectors and shared memory size of ivshmem are
92 - (x86_64) The default shared memory size is bigger than the memory
97 # n = number of vectors, l = shared memory size
126 #. Write a message in the shared memory. The shared memory size *must* be kept
128 ``write_shared_memory`` script; failing to respect the shared memory size
144 # ./write_shared_memory.sh -m "your message" -s <size of shared memory>
169 #. The sample will print the text in the shared memory whenever an interrupt is
[all …]
/Zephyr-latest/arch/arm/core/mmu/
Darm_mmu_priv.h98 uint32_t shared : 1; member
132 uint32_t shared : 1; member
143 uint32_t shared : 1; member
195 uint32_t shared : 1; member
/Zephyr-latest/samples/subsys/ipc/openamp/boards/
Dmimxrt1170_evk_mimxrt1176_cm7_A.overlay14 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
16 * Note that shared memory must have specific MPU attributes set.
Dmimxrt1170_evk_mimxrt1176_cm7_B.overlay14 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
16 * Note that shared memory must have specific MPU attributes set.
Dmimxrt1160_evk_mimxrt1166_cm7.overlay14 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
16 * Note that shared memory must have specific MPU attributes set.
Dlpcxpresso54114_lpc54114_m4.overlay10 * shared memory reserved for the inter-processor communication
Dv2m_musca_b1.overlay10 * shared memory reserved for the inter-processor communication
/Zephyr-latest/dts/common/nordic/
Dnrf5340_shared_sram_partition.dtsi7 * This file specifies the default shared memory region used for inter-procesor
13 * used, it is up to the author to ensure the shared memory region resides in
16 * By default the last 64 kB of application core SRAM is allocated as shared
/Zephyr-latest/subsys/emul/espi/
DKconfig17 int "Host I/O peripheral port size for shared memory in emulator"
22 over the shared memory region which returns the ACPI response data.
/Zephyr-latest/drivers/interrupt_controller/
DKconfig.it8xxx215 Configures the maximum number of clients allowed per shared
16 instance of the shared interrupt driver. To conserve RAM set
/Zephyr-latest/samples/subsys/ipc/openamp/remote/boards/
Dmimxrt1170_evk_mimxrt1176_cm4_B.overlay28 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
30 * Note that shared memory must have specific MPU attributes set
Dmimxrt1160_evk_mimxrt1166_cm4.overlay30 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
32 * Note that shared memory must have specific MPU attributes set
Dmimxrt1170_evk_mimxrt1176_cm4.overlay30 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
32 * Note that shared memory must have specific MPU attributes set
Dlpcxpresso54114_lpc54114_m0.overlay10 * shared memory reserved for the inter-processor communication
Dv2m_musca_b1_musca_b1_ns.overlay10 * shared memory reserved for the inter-processor communication
/Zephyr-latest/boards/nxp/mimxrt595_evk/
Dmimxrt595_evk_mimxrt595s_f1.dts30 /* Reserve first 512kB of shared memory for ADSP. */
40 /* On RT595 ADSP shared RAM is mapped at offset 0 on the code bus and at
/Zephyr-latest/doc/kernel/memory_management/
Dshared_multi_heap.rst6 The shared multi-heap memory pool manager uses the multi-heap allocator to
10 All the different regions can be added at run-time to the shared multi-heap
16 1. At boot time some platform code initialize the shared multi-heap framework
28 // Init the shared multi-heap pool
/Zephyr-latest/doc/hardware/arch/
Darm-scmi.rst110 This form of transport uses shared memory for reading/writing messages
111 and doorbells for signaling. The interaction with the shared
116 Interacting with the shared memory area and signaling are abstracted by the
117 transport API, which is implemented by the shared memory and doorbell-based
123 #. Write message to the shared memory area.
125 …#. Platform reads message from shared memory area, processes it, writes the reply back to the same…
126 #. Zephyr reads reply from the shared memory area.
128 In the context of this transport, a channel is comprised of a **single** shared
193 /* mandatory to use shared memory driver */
199 /* compatible for shared memory and doorbell-based transport */
/Zephyr-latest/subsys/ipc/ipc_service/lib/
DKconfig.icmsg5 bool "Synchronize access to shared memory"
9 Provide synchronization access to shared memory at a library level.
58 from the system work queue. The queue is shared among instances.
80 with read/write semantics on top of a memory region shared by the
/Zephyr-latest/drivers/w1/
DKconfig.ds2477_859 This enables support for the shared ds2477/85 1-Wire driver.
/Zephyr-latest/samples/subsys/ipc/rpmsg_service/boards/
Dv2m_musca_b1.overlay10 * shared memory reserved for the inter-processor communication

12345678910>>...12