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Searched refs:SYSTEM_CPU_PER_CONF_REG (Results 1 – 12 of 12) sorted by relevance

/hal_espressif-3.7.0/components/hal/esp32s3/include/hal/
Dclk_tree_ll.h268 uint32_t pll_freq_sel = REG_GET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_PLL_FREQ_SEL); in clk_ll_bbpll_get_freq_mhz()
288 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_PLL_FREQ_SEL, 0); in clk_ll_bbpll_set_freq_mhz()
291 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_PLL_FREQ_SEL, 1); in clk_ll_bbpll_set_freq_mhz()
443 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, 0); in clk_ll_cpu_set_freq_mhz_from_pll()
446 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, 1); in clk_ll_cpu_set_freq_mhz_from_pll()
449 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, 2); in clk_ll_cpu_set_freq_mhz_from_pll()
464 uint32_t cpu_freq_sel = REG_GET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL); in clk_ll_cpu_get_freq_mhz_from_pll()
705 SET_PERI_REG_MASK(SYSTEM_CPU_PER_CONF_REG, SYSTEM_PLL_FREQ_SEL); in clk_ll_bbpll_set_frequency_for_mspi_tuning()
/hal_espressif-3.7.0/components/hal/esp32c3/include/hal/
Dclk_tree_ll.h266 uint32_t pll_freq_sel = REG_GET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_PLL_FREQ_SEL); in clk_ll_bbpll_get_freq_mhz()
286 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_PLL_FREQ_SEL, 0); in clk_ll_bbpll_set_freq_mhz()
289 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_PLL_FREQ_SEL, 1); in clk_ll_bbpll_set_freq_mhz()
443 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, 0); in clk_ll_cpu_set_freq_mhz_from_pll()
446 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, 1); in clk_ll_cpu_set_freq_mhz_from_pll()
461 uint32_t cpu_freq_sel = REG_GET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL); in clk_ll_cpu_get_freq_mhz_from_pll()
/hal_espressif-3.7.0/components/hal/esp32c2/include/hal/
Dclk_tree_ll.h200 uint32_t pll_freq_sel = REG_GET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_PLL_FREQ_SEL); in clk_ll_bbpll_get_freq_mhz()
219 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_PLL_FREQ_SEL, 1); in clk_ll_bbpll_set_freq_mhz()
335 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, 0); in clk_ll_cpu_set_freq_mhz_from_pll()
338 REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, 1); in clk_ll_cpu_set_freq_mhz_from_pll()
353 uint32_t cpu_freq_sel = REG_GET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL); in clk_ll_cpu_get_freq_mhz_from_pll()
/hal_espressif-3.7.0/tools/esptool_py/flasher_stub/
Dstub_flasher.c82 cpu_per_conf_reg = READ_REG(SYSTEM_CPU_PER_CONF_REG); in set_max_cpu_freq()
86 …WRITE_REG(SYSTEM_CPU_PER_CONF_REG, (cpu_per_conf_reg & ~SYSTEM_CPUPERIOD_SEL_M) | (SYSTEM_CPUPERIO… in set_max_cpu_freq()
103 …WRITE_REG(SYSTEM_CPU_PER_CONF_REG, (READ_REG(SYSTEM_CPU_PER_CONF_REG) & ~SYSTEM_CPUPERIOD_SEL_M) |… in reset_cpu_freq()
/hal_espressif-3.7.0/components/esp_hw_support/port/esp32c2/
Drtc_init.c114 CLEAR_PERI_REG_MASK(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
116 SET_PERI_REG_MASK(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
/hal_espressif-3.7.0/components/esp_hw_support/port/esp32c3/
Drtc_init.c147 CLEAR_PERI_REG_MASK(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
149 SET_PERI_REG_MASK(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
/hal_espressif-3.7.0/components/esp_hw_support/
Dcpu.c17 #define SYSTEM_CPU_PER_CONF_REG PCR_CPU_WAITI_CONF_REG macro
114 …if (esp_cpu_dbgr_is_attached() && DPORT_REG_GET_BIT(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPU_WAIT_MODE_… in esp_cpu_wait_for_intr()
/hal_espressif-3.7.0/tools/esptool_py/flasher_stub/include/
Dsoc_support.h432 #define SYSTEM_CPU_PER_CONF_REG (SYSTEM_BASE_REG + 0x008) macro
446 #define SYSTEM_CPU_PER_CONF_REG (SYSTEM_BASE_REG + 0x018) macro
/hal_espressif-3.7.0/components/esp_hw_support/port/esp32s3/
Drtc_init.c192 CLEAR_PERI_REG_MASK(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
194 SET_PERI_REG_MASK(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
/hal_espressif-3.7.0/components/soc/esp32c2/include/soc/
Dsystem_reg.h54 #define SYSTEM_CPU_PER_CONF_REG (DR_REG_SYSTEM_BASE + 0x8) macro
/hal_espressif-3.7.0/components/soc/esp32c3/include/soc/
Dsystem_reg.h50 #define SYSTEM_CPU_PER_CONF_REG (DR_REG_SYSTEM_BASE + 0x008) macro
/hal_espressif-3.7.0/components/soc/esp32s3/include/soc/
Dsystem_reg.h79 #define SYSTEM_CPU_PER_CONF_REG (DR_REG_SYSTEM_BASE + 0x10) macro