/hal_espressif-3.6.0/components/esp_hw_support/port/esp32s2/ |
D | rtc_time.c | 36 static uint32_t rtc_clk_cal_internal_oneoff(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles) in rtc_clk_cal_internal_oneoff() argument 52 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal_oneoff() 59 if (cal_clk == RTC_CAL_32K_XTAL) { in rtc_clk_cal_internal_oneoff() 62 } else if (cal_clk == RTC_CAL_8MD256) { in rtc_clk_cal_internal_oneoff() 101 static uint32_t rtc_clk_cal_internal_cycling(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles) in rtc_clk_cal_internal_cycling() argument 108 …I_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING) || in_calibration_clk != cal_clk) { in rtc_clk_cal_internal_cycling() 110 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal_cycling() 144 uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles, uint32_t cal_mode) in rtc_clk_cal_internal() argument 151 if (cal_clk == RTC_CAL_RTC_MUX) { in rtc_clk_cal_internal() 154 cal_clk = RTC_CAL_32K_XTAL; in rtc_clk_cal_internal() [all …]
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D | rtc_init.c | 253 rtc_cal_sel_t cal_clk = RTC_CAL_RTC_MUX; in calibrate_ocode() local 255 cal_clk = RTC_CAL_32K_XTAL; in calibrate_ocode() 257 cal_clk = RTC_CAL_8MD256; in calibrate_ocode() 261 uint32_t slow_clk_period = rtc_clk_cal(cal_clk, 100); in calibrate_ocode()
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/hal_espressif-3.6.0/components/esp_hw_support/port/esp32c3/ |
D | rtc_time.c | 33 uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles) in rtc_clk_cal_internal() argument 40 if (cal_clk == RTC_CAL_RTC_MUX) { in rtc_clk_cal_internal() 43 cal_clk = RTC_CAL_32K_XTAL; in rtc_clk_cal_internal() 45 cal_clk = RTC_CAL_8MD256; in rtc_clk_cal_internal() 47 } else if (cal_clk == RTC_CAL_INTERNAL_OSC) { in rtc_clk_cal_internal() 48 cal_clk = RTC_CAL_RTC_MUX; in rtc_clk_cal_internal() 54 if (cal_clk == RTC_CAL_32K_XTAL && !dig_32k_xtal_state) { in rtc_clk_cal_internal() 58 if (cal_clk == RTC_CAL_8MD256) { in rtc_clk_cal_internal() 75 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal() 82 if (cal_clk == RTC_CAL_32K_XTAL) { in rtc_clk_cal_internal() [all …]
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D | rtc_init.c | 221 rtc_cal_sel_t cal_clk = RTC_CAL_RTC_MUX; in calibrate_ocode() local 223 cal_clk = RTC_CAL_32K_XTAL; in calibrate_ocode() 225 cal_clk = RTC_CAL_8MD256; in calibrate_ocode() 229 uint32_t slow_clk_period = rtc_clk_cal(cal_clk, 100); in calibrate_ocode()
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/hal_espressif-3.6.0/components/esp_hw_support/port/esp32s3/ |
D | rtc_time.c | 36 uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles) in rtc_clk_cal_internal() argument 43 if (cal_clk == RTC_CAL_RTC_MUX) { in rtc_clk_cal_internal() 46 cal_clk = RTC_CAL_32K_XTAL; in rtc_clk_cal_internal() 48 cal_clk = RTC_CAL_8MD256; in rtc_clk_cal_internal() 50 } else if (cal_clk == RTC_CAL_INTERNAL_OSC) { in rtc_clk_cal_internal() 51 cal_clk = RTC_CAL_RTC_MUX; in rtc_clk_cal_internal() 56 if (cal_clk == RTC_CAL_32K_XTAL && !dig_32k_xtal_state) { in rtc_clk_cal_internal() 60 if (cal_clk == RTC_CAL_8MD256) { in rtc_clk_cal_internal() 77 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal() 84 if (cal_clk == RTC_CAL_32K_XTAL) { in rtc_clk_cal_internal() [all …]
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D | rtc_clk.c | 129 rtc_cal_sel_t cal_clk = RTC_CAL_RTC_MUX; in wait_dig_dbias_valid() local 131 cal_clk = RTC_CAL_32K_XTAL; in wait_dig_dbias_valid() 133 cal_clk = RTC_CAL_8MD256; in wait_dig_dbias_valid() 135 rtc_clk_cal(cal_clk, rtc_cycles); in wait_dig_dbias_valid()
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D | rtc_init.c | 285 rtc_cal_sel_t cal_clk = RTC_CAL_RTC_MUX; in calibrate_ocode() local 287 cal_clk = RTC_CAL_32K_XTAL; in calibrate_ocode() 289 cal_clk = RTC_CAL_8MD256; in calibrate_ocode() 293 uint32_t slow_clk_period = rtc_clk_cal(cal_clk, 100); in calibrate_ocode()
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/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/ |
D | rtc_time.c | 38 static uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles) in rtc_clk_cal_internal() argument 43 if (cal_clk == RTC_CAL_32K_XTAL && !dig_32k_xtal_state) { in rtc_clk_cal_internal() 47 if (cal_clk == RTC_CAL_8MD256) { in rtc_clk_cal_internal() 51 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal() 57 if (cal_clk == RTC_CAL_32K_XTAL || in rtc_clk_cal_internal() 58 (cal_clk == RTC_CAL_RTC_MUX && slow_freq == RTC_SLOW_FREQ_32K_XTAL)) { in rtc_clk_cal_internal() 60 } else if (cal_clk == RTC_CAL_8MD256 || in rtc_clk_cal_internal() 61 (cal_clk == RTC_CAL_RTC_MUX && slow_freq == RTC_SLOW_FREQ_8MD256)) { in rtc_clk_cal_internal() 100 if (cal_clk == RTC_CAL_8MD256) { in rtc_clk_cal_internal() 111 uint32_t rtc_clk_cal_ratio(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles) in rtc_clk_cal_ratio() argument [all …]
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/hal_espressif-3.6.0/components/esp_hw_support/port/esp32h2/ |
D | rtc_time.c | 32 uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles) in rtc_clk_cal_internal() argument 39 if (cal_clk == RTC_CAL_RTC_MUX) { in rtc_clk_cal_internal() 42 cal_clk = RTC_CAL_32K_XTAL; in rtc_clk_cal_internal() 44 cal_clk = RTC_CAL_RC32K; in rtc_clk_cal_internal() 49 if (cal_clk == RTC_CAL_32K_XTAL && !dig_32k_xtal_state) { in rtc_clk_cal_internal() 54 if (cal_clk == RTC_CAL_RC32K && !dig_rc32k_state) { in rtc_clk_cal_internal() 71 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal() 78 if (cal_clk == RTC_CAL_32K_XTAL) { in rtc_clk_cal_internal() 81 } else if (cal_clk == RTC_CAL_RC32K) { in rtc_clk_cal_internal() 113 uint32_t rtc_clk_cal_ratio(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles) in rtc_clk_cal_ratio() argument [all …]
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/hal_espressif-3.6.0/components/ulp/ |
D | ulp.c | 167 rtc_cal_sel_t cal_clk = RTC_CAL_RTC_MUX; in ulp_set_wakeup_period() 169 cal_clk = RTC_CAL_32K_XTAL; in ulp_set_wakeup_period() 171 cal_clk = RTC_CAL_8MD256; in ulp_set_wakeup_period() 173 uint32_t slow_clk_period = rtc_clk_cal(cal_clk, 100); in ulp_set_wakeup_period()
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/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/ |
D | rtc.h | 535 uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles, uint32_t cal_mode); 550 uint32_t rtc_clk_cal(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles); 559 uint32_t rtc_clk_cal_ratio(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles); 897 uint32_t rtc_clk_cal_cycling(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles);
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/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/ |
D | rtc.h | 503 uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles); 518 uint32_t rtc_clk_cal(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles); 527 uint32_t rtc_clk_cal_ratio(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles);
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/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/ |
D | rtc.h | 532 uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles); 552 uint32_t rtc_clk_cal(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles); 561 uint32_t rtc_clk_cal_ratio(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles);
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/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/ |
D | rtc.h | 519 uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles); 534 uint32_t rtc_clk_cal(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles); 543 uint32_t rtc_clk_cal_ratio(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles);
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/hal_espressif-3.6.0/components/soc/esp32/include/soc/ |
D | rtc.h | 411 uint32_t rtc_clk_cal(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles); 420 uint32_t rtc_clk_cal_ratio(rtc_cal_sel_t cal_clk, uint32_t slow_clk_cycles);
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/hal_espressif-3.6.0/components/esp_hw_support/test/ |
D | test_rtc_clk.c | 58 static uint32_t calibrate_one(rtc_cal_sel_t cal_clk, const char* name) in calibrate_one() argument 66 cali_val = rtc_clk_cal(cal_clk, cal_count); in calibrate_one()
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