/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32c2/ |
D | mem_definition.py | 39 EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x118 variable in EfuseDefineRegisters
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D | fields.py | 242 self.REGS.EFUSE_WR_TIM_CONF2_REG, self.REGS.EFUSE_PWR_OFF_NUM_M, 0x190
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/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32h2beta1/ |
D | mem_definition.py | 33 EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F4 variable in EfuseDefineRegisters
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D | fields.py | 247 self.REGS.EFUSE_WR_TIM_CONF2_REG, self.REGS.EFUSE_PWR_OFF_NUM_M, 0x190
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/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32s3/ |
D | mem_definition.py | 34 EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F8 variable in EfuseDefineRegisters
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D | fields.py | 253 self.REGS.EFUSE_WR_TIM_CONF2_REG, self.REGS.EFUSE_PWR_OFF_NUM_M, 0x190
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/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32s3beta2/ |
D | mem_definition.py | 34 EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F8 variable in EfuseDefineRegisters
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D | fields.py | 253 self.REGS.EFUSE_WR_TIM_CONF2_REG, self.REGS.EFUSE_PWR_OFF_NUM_M, 0x190
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/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32c6/ |
D | mem_definition.py | 33 EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F4 variable in EfuseDefineRegisters
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D | fields.py | 253 self.REGS.EFUSE_WR_TIM_CONF2_REG, self.REGS.EFUSE_PWR_OFF_NUM_M, 0x190
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/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32h2/ |
D | mem_definition.py | 33 EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F4 variable in EfuseDefineRegisters
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D | fields.py | 254 self.REGS.EFUSE_WR_TIM_CONF2_REG, self.REGS.EFUSE_PWR_OFF_NUM_M, 0x190
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/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32c3/ |
D | mem_definition.py | 33 EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F4 variable in EfuseDefineRegisters
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D | fields.py | 253 self.REGS.EFUSE_WR_TIM_CONF2_REG, self.REGS.EFUSE_PWR_OFF_NUM_M, 0x190
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/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32s2/ |
D | mem_definition.py | 33 EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F8 variable in EfuseDefineRegisters
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D | fields.py | 284 self.REGS.EFUSE_WR_TIM_CONF2_REG,
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/hal_espressif-3.6.0/components/efuse/esp32h2/ |
D | esp_efuse_utility.c | 64 REG_SET_FIELD(EFUSE_WR_TIM_CONF2_REG, EFUSE_PWR_OFF_NUM, 0x60); in esp_efuse_set_timing()
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/hal_espressif-3.6.0/components/efuse/esp32s3/ |
D | esp_efuse_utility.c | 57 REG_SET_FIELD(EFUSE_WR_TIM_CONF2_REG, EFUSE_PWR_OFF_NUM, 0x190); in esp_efuse_set_timing()
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/hal_espressif-3.6.0/components/efuse/esp32c3/ |
D | esp_efuse_utility.c | 57 REG_SET_FIELD(EFUSE_WR_TIM_CONF2_REG, EFUSE_PWR_OFF_NUM, 0x190); in esp_efuse_set_timing()
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/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/ |
D | efuse_reg.h | 1917 #define EFUSE_WR_TIM_CONF2_REG (DR_REG_EFUSE_BASE + 0x1F8) macro
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/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/ |
D | efuse_reg.h | 2039 #define EFUSE_WR_TIM_CONF2_REG (DR_REG_EFUSE_BASE + 0x1F4) macro
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/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/ |
D | efuse_reg.h | 1979 #define EFUSE_WR_TIM_CONF2_REG (DR_REG_EFUSE_BASE + 0x1F4) macro
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/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/ |
D | efuse_reg.h | 2296 #define EFUSE_WR_TIM_CONF2_REG (DR_REG_EFUSE_BASE + 0x1F8) macro
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