DPORT_PRO_CPU_DISABLED_CACHE_IA_DRAM1 (reference) in projects: hal_espressif-3.6.0

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Searched refs:DPORT_PRO_CPU_DISABLED_CACHE_IA_DRAM1 (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-3.6.0/components/esp_system/port/soc/esp32/
D	cache_err_int.c	`82 DPORT_PRO_CPU_DISABLED_CACHE_IA_DRAM1 \| in esp_cache_err_get_cpuid()`
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
D	dport_reg.h	`2889 #define DPORT_PRO_CPU_DISABLED_CACHE_IA_DRAM1 BIT(10) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
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babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
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chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
hal_altera-2.7.6
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hal_ambiq-3.6.0
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hal_espressif-2.7.6
hal_espressif-3.4.0
hal_espressif-3.5.0
hal_espressif-3.6.0
hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
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hal_openisa-2.7.6
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zscilib-3.4.0