DPORT_APP_CPU_DISABLED_CACHE_IA_DROM0 (reference) in projects: hal_espressif-3.6.0

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Searched refs:DPORT_APP_CPU_DISABLED_CACHE_IA_DROM0 (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-3.6.0/components/esp_system/port/soc/esp32/
D	cache_err_int.c	`95 DPORT_APP_CPU_DISABLED_CACHE_IA_DROM0 \| in esp_cache_err_get_cpuid()`
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
D	dport_reg.h	`3077 #define DPORT_APP_CPU_DISABLED_CACHE_IA_DROM0 BIT(14) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
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edtt-3.7.0
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