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Searched refs:xtal_fpu (Results 1 – 13 of 13) sorted by relevance

/hal_espressif-3.4.0/components/esp_hw_support/port/esp32c3/
Drtc_sleep.c86 … (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_BIASSLP_SLEEP_ON : RTC_CNTL_BIASSLP_SLEEP_DEFAULT); in rtc_sleep_init()
89 … (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_PD_CUR_SLEEP_ON : RTC_CNTL_PD_CUR_SLEEP_DEFAULT); in rtc_sleep_init()
134 REG_SET_FIELD(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_XTL_FORCE_PU, cfg.xtal_fpu); in rtc_sleep_init()
135 REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING, cfg.xtal_fpu); in rtc_sleep_init()
Drtc_init.c81 if (!(cfg.xtal_fpu | cfg.bbpll_fpu)) { in rtc_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s3/
Drtc_sleep.c102 … (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_BIASSLP_SLEEP_ON : RTC_CNTL_BIASSLP_SLEEP_DEFAULT); in rtc_sleep_init()
105 … (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_PD_CUR_SLEEP_ON : RTC_CNTL_PD_CUR_SLEEP_DEFAULT); in rtc_sleep_init()
144 REG_SET_FIELD(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_XTL_FORCE_PU, cfg.xtal_fpu); in rtc_sleep_init()
145 REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING, cfg.xtal_fpu); in rtc_sleep_init()
Drtc_init.c105 if (!(cfg.xtal_fpu | cfg.bbpll_fpu)) { in rtc_init()
/hal_espressif-3.4.0/components/soc/esp32s2/include/soc/
Drtc.h674 uint32_t xtal_fpu : 1; //!< keep main XTAL powered up in sleep member
709 .xtal_fpu = is_dslp(sleep_flags) ? 0 : ((sleep_flags) & RTC_SLEEP_PD_XTAL) ? 0 : 1, \
830 uint32_t xtal_fpu : 1; member
849 .xtal_fpu = 0, \
/hal_espressif-3.4.0/components/soc/esp32c3/include/soc/
Drtc.h649 uint32_t xtal_fpu : 1; //!< keep main XTAL powered up in sleep member
685 .xtal_fpu = is_dslp(sleep_flags) ? 0 : ((sleep_flags) & RTC_SLEEP_PD_XTAL) ? 0 : 1, \
807 uint32_t xtal_fpu : 1; member
826 .xtal_fpu = 0, \
/hal_espressif-3.4.0/components/soc/esp32s3/include/soc/
Drtc.h656 uint32_t xtal_fpu : 1; //!< keep main XTAL powered up in sleep member
692 .xtal_fpu = is_dslp(sleep_flags) ? 0 : ((sleep_flags) & RTC_SLEEP_PD_XTAL) ? 0 : 1, \
825 uint32_t xtal_fpu : 1; member
844 .xtal_fpu = 0, \
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s2/
Drtc_sleep.c95 … (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_BIASSLP_SLEEP_ON : RTC_CNTL_BIASSLP_SLEEP_DEFAULT); in rtc_sleep_init()
98 … (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_PD_CUR_SLEEP_ON : RTC_CNTL_PD_CUR_SLEEP_DEFAULT); in rtc_sleep_init()
136 REG_SET_FIELD(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_XTL_FORCE_PU, cfg.xtal_fpu); in rtc_sleep_init()
Drtc_init.c83 if (!(cfg.xtal_fpu | cfg.bbpll_fpu)) { in rtc_init()
/hal_espressif-3.4.0/components/soc/esp32h2/include/soc/
Drtc.h665 uint32_t xtal_fpu : 1; //!< keep main XTAL powered up in sleep member
701 .xtal_fpu = is_dslp(sleep_flags) ? 0 : ((sleep_flags) & RTC_SLEEP_PD_XTAL) ? 0 : 1, \
822 uint32_t xtal_fpu : 1; member
841 .xtal_fpu = 0, \
/hal_espressif-3.4.0/components/soc/esp32/include/soc/
Drtc.h506 uint32_t xtal_fpu : 1; //!< keep main XTAL powered up in sleep member
540 .xtal_fpu = ((sleep_flags) & RTC_SLEEP_PD_XTAL) ? 0 : 1 \
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32/
Drtc_sleep.c181 REG_SET_FIELD(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_XTL_FORCE_PU, cfg.xtal_fpu); in rtc_sleep_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32h2/
Drtc_init.c64 if (!(cfg.xtal_fpu | cfg.bbpll_fpu)) { in rtc_init()