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Searched refs:slow_freq (Results 1 – 22 of 22) sorted by relevance

/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s2/
Drtc_clk_init.c71 if (cfg.slow_freq == RTC_SLOW_FREQ_32K_XTAL) { in rtc_clk_init()
75 bool need_8md256 = cfg.slow_freq == RTC_SLOW_FREQ_8MD256; in rtc_clk_init()
79 rtc_clk_slow_freq_set(cfg.slow_freq); in rtc_clk_init()
Drtc_time.c152 rtc_slow_freq_t slow_freq = rtc_clk_slow_freq_get(); in rtc_clk_cal_internal() local
153 if (slow_freq == RTC_SLOW_FREQ_32K_XTAL) { in rtc_clk_cal_internal()
155 } else if (slow_freq == RTC_SLOW_FREQ_8MD256) { in rtc_clk_cal_internal()
Drtc_clk.c153 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq) in rtc_clk_slow_freq_set() argument
155 REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL, slow_freq); in rtc_clk_slow_freq_set()
161 (slow_freq == RTC_SLOW_FREQ_32K_XTAL) ? 1 : 0); in rtc_clk_slow_freq_set()
166 …REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU, (slow_freq == RTC_SLOW_FREQ_8MD256) ?… in rtc_clk_slow_freq_set()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32c3/
Drtc_clk_init.c70 if (cfg.slow_freq == RTC_SLOW_FREQ_32K_XTAL) { in rtc_clk_init()
74 bool need_8md256 = cfg.slow_freq == RTC_SLOW_FREQ_8MD256; in rtc_clk_init()
78 rtc_clk_slow_freq_set(cfg.slow_freq); in rtc_clk_init()
Drtc_time.c41 rtc_slow_freq_t slow_freq = rtc_clk_slow_freq_get(); in rtc_clk_cal_internal() local
42 if (slow_freq == RTC_SLOW_FREQ_32K_XTAL) { in rtc_clk_cal_internal()
44 } else if (slow_freq == RTC_SLOW_FREQ_8MD256) { in rtc_clk_cal_internal()
Drtc_clk.c116 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq) in rtc_clk_slow_freq_set() argument
118 REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL, slow_freq); in rtc_clk_slow_freq_set()
124 (slow_freq == RTC_SLOW_FREQ_32K_XTAL) ? 1 : 0); in rtc_clk_slow_freq_set()
129 …REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU, (slow_freq == RTC_SLOW_FREQ_8MD256) ?… in rtc_clk_slow_freq_set()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s3/
Drtc_clk_init.c67 if (cfg.slow_freq == RTC_SLOW_FREQ_32K_XTAL) { in rtc_clk_init()
71 bool need_8md256 = cfg.slow_freq == RTC_SLOW_FREQ_8MD256; in rtc_clk_init()
75 rtc_clk_slow_freq_set(cfg.slow_freq); in rtc_clk_init()
Drtc_time.c44 rtc_slow_freq_t slow_freq = rtc_clk_slow_freq_get(); in rtc_clk_cal_internal() local
45 if (slow_freq == RTC_SLOW_FREQ_32K_XTAL) { in rtc_clk_cal_internal()
47 } else if (slow_freq == RTC_SLOW_FREQ_8MD256) { in rtc_clk_cal_internal()
Drtc_clk.c138 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq) in rtc_clk_slow_freq_set() argument
140 REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL, slow_freq); in rtc_clk_slow_freq_set()
146 (slow_freq == RTC_SLOW_FREQ_32K_XTAL) ? 1 : 0); in rtc_clk_slow_freq_set()
151 …REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU, (slow_freq == RTC_SLOW_FREQ_8MD256) ?… in rtc_clk_slow_freq_set()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32/
Drtc_clk_init.c125 if (cfg.slow_freq == RTC_SLOW_FREQ_32K_XTAL) { in rtc_clk_init()
129 bool need_8md256 = cfg.slow_freq == RTC_SLOW_FREQ_8MD256; in rtc_clk_init()
133 rtc_clk_slow_freq_set(cfg.slow_freq); in rtc_clk_init()
Drtc_time.c56 rtc_slow_freq_t slow_freq = REG_GET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL); in rtc_clk_cal_internal() local
58 (cal_clk == RTC_CAL_RTC_MUX && slow_freq == RTC_SLOW_FREQ_32K_XTAL)) { in rtc_clk_cal_internal()
61 (cal_clk == RTC_CAL_RTC_MUX && slow_freq == RTC_SLOW_FREQ_8MD256)) { in rtc_clk_cal_internal()
Drtc_clk.c311 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq) in rtc_clk_slow_freq_set() argument
313 REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL, slow_freq); in rtc_clk_slow_freq_set()
316 (slow_freq == RTC_SLOW_FREQ_32K_XTAL) ? 1 : 0); in rtc_clk_slow_freq_set()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32h2/
Drtc_time.c40 rtc_slow_freq_t slow_freq = rtc_clk_slow_freq_get(); in rtc_clk_cal_internal() local
41 if (slow_freq == RTC_SLOW_FREQ_32K_XTAL) { in rtc_clk_cal_internal()
43 } else if (slow_freq == RTC_SLOW_FREQ_RC32K) { in rtc_clk_cal_internal()
Drtc_clk_init.c79 if (cfg.slow_freq == RTC_SLOW_FREQ_32K_XTAL) { in rtc_clk_init()
86 rtc_clk_slow_freq_set(cfg.slow_freq); in rtc_clk_init()
Drtc_clk.c104 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq) in rtc_clk_slow_freq_set() argument
106 REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL, slow_freq); in rtc_clk_slow_freq_set()
107 rtc_clk_32k_enable((slow_freq == RTC_SLOW_FREQ_32K_XTAL) ? 1 : 0); in rtc_clk_slow_freq_set()
108 rtc_clk_rc32k_enable((slow_freq == RTC_SLOW_FREQ_RC32K) ? 1 : 0); in rtc_clk_slow_freq_set()
/hal_espressif-3.4.0/components/soc/esp32/include/soc/
Drtc.h137 rtc_slow_freq_t slow_freq : 2; //!< RTC_SLOW_CLK frequency to set member
150 .slow_freq = RTC_SLOW_FREQ_RTC, \
275 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq);
/hal_espressif-3.4.0/components/soc/esp32s2/include/soc/
Drtc.h234 rtc_slow_freq_t slow_freq : 2; //!< RTC_SLOW_CLK frequency to set member
248 .slow_freq = RTC_SLOW_FREQ_RTC, \
422 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq);
/hal_espressif-3.4.0/components/soc/esp32c3/include/soc/
Drtc.h217 rtc_slow_freq_t slow_freq : 2; //!< RTC_SLOW_CLK frequency to set member
231 .slow_freq = RTC_SLOW_FREQ_RTC, \
390 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq);
/hal_espressif-3.4.0/components/soc/esp32s3/include/soc/
Drtc.h217 rtc_slow_freq_t slow_freq : 2; //!< RTC_SLOW_CLK frequency to set member
231 .slow_freq = RTC_SLOW_FREQ_RTC, \
398 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq);
/hal_espressif-3.4.0/components/soc/esp32h2/include/soc/
Drtc.h218 rtc_slow_freq_t slow_freq : 2; //!< RTC_SLOW_CLK frequency to set member
233 .slow_freq = RTC_SLOW_FREQ_RTC, \
402 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq);
/hal_espressif-3.4.0/components/bootloader_support/src/
Dbootloader_clock_init.c49 clk_cfg.slow_freq = rtc_clk_slow_freq_get(); in bootloader_clock_configure()
/hal_espressif-3.4.0/components/soc/src/esp32/
Drtc_clk.c276 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq) in rtc_clk_slow_freq_set() argument
278 REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL, slow_freq); in rtc_clk_slow_freq_set()
281 (slow_freq == RTC_SLOW_FREQ_32K_XTAL) ? 1 : 0); in rtc_clk_slow_freq_set()