Searched refs:fe_fpu (Results 1 – 8 of 8) sorted by relevance
| /hal_espressif-3.4.0/components/esp_hw_support/port/esp32c3/ |
| D | rtc_sleep.c | 34 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_DC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
35 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_PBUS_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
36 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_AGC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
42 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
43 REG_SET_FIELD(FE2_TX_INTERP_CTRL, FE2_TX_INF_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
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| /hal_espressif-3.4.0/components/esp_hw_support/port/esp32s2/ |
| D | rtc_sleep.c | 35 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_DC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
36 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_PBUS_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
37 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_AGC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
43 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
44 REG_SET_FIELD(FE2_TX_INTERP_CTRL, FE2_TX_INF_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pd()
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| /hal_espressif-3.4.0/components/esp_hw_support/port/esp32s3/ |
| D | rtc_sleep.c | 35 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_DC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
36 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_PBUS_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
37 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_AGC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
43 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
44 REG_SET_FIELD(FE2_TX_INTERP_CTRL, FE2_TX_INF_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
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| /hal_espressif-3.4.0/components/esp_hw_support/port/esp32h2/ |
| D | rtc_sleep.c | 37 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_DC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
38 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_PBUS_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
39 REG_SET_FIELD(SYSCON_FRONT_END_MEM_PD_REG, SYSCON_AGC_MEM_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
45 REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
46 REG_SET_FIELD(FE2_TX_INTERP_CTRL, FE2_TX_INF_FORCE_PU, cfg.fe_fpu); in rtc_sleep_pu()
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| /hal_espressif-3.4.0/components/soc/esp32s2/include/soc/ |
| D | rtc.h | 638 uint32_t fe_fpu : 1; //!< Set to 1 to power down WiFi in sleep member
651 .fe_fpu = (val), \
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| /hal_espressif-3.4.0/components/soc/esp32c3/include/soc/ |
| D | rtc.h | 606 uint32_t fe_fpu : 1; //!< Set to 1 to power UP WiFi in sleep member
621 .fe_fpu = (val), \
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| /hal_espressif-3.4.0/components/soc/esp32s3/include/soc/ |
| D | rtc.h | 613 uint32_t fe_fpu : 1; //!< Set to 1 to power UP WiFi in sleep member
628 .fe_fpu = (val), \
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| /hal_espressif-3.4.0/components/soc/esp32h2/include/soc/ |
| D | rtc.h | 622 uint32_t fe_fpu : 1; //!< Set to 1 to power UP WiFi in sleep member
637 .fe_fpu = (val), \
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