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Searched refs:RTC_CNTL_PD_CUR_SLEEP_DEFAULT (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-3.4.0/components/esp_hw_support/port/esp32c3/
Drtc_sleep.c89 … (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_PD_CUR_SLEEP_ON : RTC_CNTL_PD_CUR_SLEEP_DEFAULT); in rtc_sleep_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s2/
Drtc_sleep.c98 … (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_PD_CUR_SLEEP_ON : RTC_CNTL_PD_CUR_SLEEP_DEFAULT); in rtc_sleep_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s3/
Drtc_sleep.c105 … (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_PD_CUR_SLEEP_ON : RTC_CNTL_PD_CUR_SLEEP_DEFAULT); in rtc_sleep_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32h2/
Drtc_sleep.c188 REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP, RTC_CNTL_PD_CUR_SLEEP_DEFAULT); in rtc_sleep_init()
/hal_espressif-3.4.0/components/soc/esp32s2/include/soc/
Drtc.h133 #define RTC_CNTL_PD_CUR_SLEEP_DEFAULT 1 macro
/hal_espressif-3.4.0/components/soc/esp32c3/include/soc/
Drtc.h119 #define RTC_CNTL_PD_CUR_SLEEP_DEFAULT 1 macro
/hal_espressif-3.4.0/components/soc/esp32s3/include/soc/
Drtc.h128 #define RTC_CNTL_PD_CUR_SLEEP_DEFAULT 1 macro
/hal_espressif-3.4.0/components/soc/esp32h2/include/soc/
Drtc.h144 #define RTC_CNTL_PD_CUR_SLEEP_DEFAULT 1 macro