Searched refs:REG_XDMAC_CSUS7 (Results 1 – 4 of 4) sorted by relevance
147 #define REG_XDMAC_CSUS7 (0x40078240) /**< (XDMAC) Channel Source Microblock Stride (chid = … macro504 #define REG_XDMAC_CSUS7 (*(__IO uint32_t*)0x40078240U) /**< (XDMAC) Channel Source Microblo… macro
147 #define REG_XDMAC_CSUS7 (0x40078240) /**< (XDMAC) Channel Source Microblock Stride 7 */ macro503 #define REG_XDMAC_CSUS7 (*(__IO uint32_t*)0x40078240U) /**< (XDMAC) Channel Source Microblo… macro
147 #define REG_XDMAC_CSUS7 (0x40078240) /**< (XDMAC) Channel Source Microblock Stride (chid = … macro503 #define REG_XDMAC_CSUS7 (*(__IO uint32_t*)0x40078240U) /**< (XDMAC) Channel Source Microblo… macro
