Searched refs:REG_XDMAC_CIM1 (Results 1 – 4 of 4) sorted by relevance
53 #define REG_XDMAC_CIM1 (0x40078098) /**< (XDMAC) Channel Interrupt Mask Register (chid = 0… macro410 #define REG_XDMAC_CIM1 (*(__I uint32_t*)0x40078098U) /**< (XDMAC) Channel Interrupt Mask … macro
53 #define REG_XDMAC_CIM1 (0x40078098) /**< (XDMAC) Channel Interrupt Mask Register 1 */ macro409 #define REG_XDMAC_CIM1 (*(__I uint32_t*)0x40078098U) /**< (XDMAC) Channel Interrupt Mask … macro
53 #define REG_XDMAC_CIM1 (0x40078098) /**< (XDMAC) Channel Interrupt Mask Register (chid = 0… macro409 #define REG_XDMAC_CIM1 (*(__I uint32_t*)0x40078098U) /**< (XDMAC) Channel Interrupt Mask … macro
