Searched refs:REG_XDMAC_CIE5 (Results 1 – 4 of 4) sorted by relevance
107 #define REG_XDMAC_CIE5 (0x40078190) /**< (XDMAC) Channel Interrupt Enable Register (chid =… macro464 #define REG_XDMAC_CIE5 (*(__O uint32_t*)0x40078190U) /**< (XDMAC) Channel Interrupt Enabl… macro
107 #define REG_XDMAC_CIE5 (0x40078190) /**< (XDMAC) Channel Interrupt Enable Register 5 */ macro463 #define REG_XDMAC_CIE5 (*(__O uint32_t*)0x40078190U) /**< (XDMAC) Channel Interrupt Enabl… macro
107 #define REG_XDMAC_CIE5 (0x40078190) /**< (XDMAC) Channel Interrupt Enable Register (chid =… macro463 #define REG_XDMAC_CIE5 (*(__O uint32_t*)0x40078190U) /**< (XDMAC) Channel Interrupt Enabl… macro
