Searched refs:REG_TC2_IMR1 (Results 1 – 6 of 6) sorted by relevance
59 #define REG_TC2_IMR1 (0x4009806CU) /**< \brief (TC2) Interrupt Mask Register (channel = 1… macro107 #define REG_TC2_IMR1 (*(RoReg*)0x4009806CU) /**< \brief (TC2) Interrupt Mask Register (channel = 1… macro
56 …#define REG_TC2_IMR1 (0x4008806CU) /**< \brief (TC2) Interrupt Mask Register (ch… macro98 …#define REG_TC2_IMR1 (*(__I uint32_t*)0x4008806CU) /**< \brief (TC2) Interrupt Mask Register (ch… macro
61 #define REG_TC2_IMR1 (0x4001406C) /**< (TC2) Interrupt Mask Register (channel = 0) 1 */ macro111 #define REG_TC2_IMR1 (*(__I uint32_t*)0x4001406CU) /**< (TC2) Interrupt Mask Register (… macro
61 #define REG_TC2_IMR1 (0x4001406C) /**< (TC2) Interrupt Mask Register (channel = 0) 1 */ macro112 #define REG_TC2_IMR1 (*(__I uint32_t*)0x4001406CU) /**< (TC2) Interrupt Mask Register (… macro
