Searched refs:REG_TC2_IER1 (Results 1 – 6 of 6) sorted by relevance
57 #define REG_TC2_IER1 (0x40098064U) /**< \brief (TC2) Interrupt Enable Register (channel =… macro105 #define REG_TC2_IER1 (*(WoReg*)0x40098064U) /**< \brief (TC2) Interrupt Enable Register (channel =… macro
54 …#define REG_TC2_IER1 (0x40088064U) /**< \brief (TC2) Interrupt Enable Register (… macro96 …#define REG_TC2_IER1 (*(__O uint32_t*)0x40088064U) /**< \brief (TC2) Interrupt Enable Register (… macro
59 #define REG_TC2_IER1 (0x40014064) /**< (TC2) Interrupt Enable Register (channel = 0) 1 */ macro109 #define REG_TC2_IER1 (*(__O uint32_t*)0x40014064U) /**< (TC2) Interrupt Enable Register… macro
59 #define REG_TC2_IER1 (0x40014064) /**< (TC2) Interrupt Enable Register (channel = 0) 1 */ macro110 #define REG_TC2_IER1 (*(__O uint32_t*)0x40014064U) /**< (TC2) Interrupt Enable Register… macro