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Searched refs:REG_TC2_CMR1 (Results 1 – 6 of 6) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dtc2.h49 #define REG_TC2_CMR1 (0x40098044U) /**< \brief (TC2) Channel Mode Register (channel = 1) … macro
97 #define REG_TC2_CMR1 (*(RwReg*)0x40098044U) /**< \brief (TC2) Channel Mode Register (channel = 1) … macro
/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dtc2.h47 …#define REG_TC2_CMR1 (0x40088044U) /**< \brief (TC2) Channel Mode Register (chan… macro
89 …#define REG_TC2_CMR1 (*(__IO uint32_t*)0x40088044U) /**< \brief (TC2) Channel Mode Register (chan… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dtc2.h51 #define REG_TC2_CMR1 (0x40014044) /**< (TC2) Channel Mode Register (channel = 0) 1 */ macro
101 #define REG_TC2_CMR1 (*(__IO uint32_t*)0x40014044U) /**< (TC2) Channel Mode Register (ch… macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dtc2.h51 #define REG_TC2_CMR1 (0x40014044) /**< (TC2) Channel Mode Register (channel = 0) 1 */ macro
102 #define REG_TC2_CMR1 (*(__IO uint32_t*)0x40014044U) /**< (TC2) Channel Mode Register (ch… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dtc2.h51 #define REG_TC2_CMR1 (0x40014044) /**< (TC2) Channel Mode Register (channel = 0) 1 */ macro
101 #define REG_TC2_CMR1 (*(__IO uint32_t*)0x40014044U) /**< (TC2) Channel Mode Register (ch… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dtc2.h51 #define REG_TC2_CMR1 (0x40014044) /**< (TC2) Channel Mode Register (channel = 0) 1 */ macro
101 #define REG_TC2_CMR1 (*(__IO uint32_t*)0x40014044U) /**< (TC2) Channel Mode Register (ch… macro