Searched refs:REG_TC0_INTENSET (Results 1 – 12 of 12) sorted by relevance
43 #define REG_TC0_INTENSET (0x4200200D) /**< \brief (TC0) Interrupt Enable Set */ macro65 #define REG_TC0_INTENSET (*(RwReg8 *)0x4200200DUL) /**< \brief (TC0) Interrupt Enable Set… macro
40 #define REG_TC0_INTENSET (0x40003809) /**< \brief (TC0) Interrupt Enable Set */ macro70 #define REG_TC0_INTENSET (*(RwReg8 *)0x40003809UL) /**< \brief (TC0) Interrupt Enable Set… macro
40 #define REG_TC0_INTENSET (0x42003009) /**< \brief (TC0) Interrupt Enable Set */ macro70 #define REG_TC0_INTENSET (*(RwReg8 *)0x42003009UL) /**< \brief (TC0) Interrupt Enable Set… macro
40 #define REG_TC0_INTENSET (0x42002009) /**< \brief (TC0) Interrupt Enable Set */ macro70 #define REG_TC0_INTENSET (*(RwReg8 *)0x42002009UL) /**< \brief (TC0) Interrupt Enable Set… macro
