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Searched refs:REG_SPI1_IER (Results 1 – 5 of 5) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dspi1.h40 …#define REG_SPI1_IER (0x4000C014U) /**< \brief (SPI1) Interrupt Enable Register … macro
52 …#define REG_SPI1_IER (*(__O uint32_t*)0x4000C014U) /**< \brief (SPI1) Interrupt Enable Register … macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dspi1.h42 #define REG_SPI1_IER (0x40058014) /**< (SPI1) Interrupt Enable Register */ macro
60 #define REG_SPI1_IER (*(__O uint32_t*)0x40058014U) /**< (SPI1) Interrupt Enable Registe… macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dspi1.h42 #define REG_SPI1_IER (0x40058014) /**< (SPI1) Interrupt Enable Register */ macro
61 #define REG_SPI1_IER (*(__O uint32_t*)0x40058014U) /**< (SPI1) Interrupt Enable Registe… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dspi1.h42 #define REG_SPI1_IER (0x40058014) /**< (SPI1) Interrupt Enable Register */ macro
60 #define REG_SPI1_IER (*(__O uint32_t*)0x40058014U) /**< (SPI1) Interrupt Enable Registe… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dspi1.h42 #define REG_SPI1_IER (0x40058014) /**< (SPI1) Interrupt Enable Register */ macro
60 #define REG_SPI1_IER (*(__O uint32_t*)0x40058014U) /**< (SPI1) Interrupt Enable Registe… macro