Searched refs:REG_RTC_IMR (Results 1 – 7 of 7) sorted by relevance
45 #define REG_RTC_IMR (0x400E1888U) /**< \brief (RTC) Interrupt Mask Register */ macro59 #define REG_RTC_IMR (*(RoReg*)0x400E1888U) /**< \brief (RTC) Interrupt Mask Register */ macro
45 #define REG_RTC_IMR (0x400E1488U) /**< \brief (RTC) Interrupt Mask Register */ macro59 #define REG_RTC_IMR (*(__I uint32_t*)0x400E1488U) /**< \brief (RTC) Interrupt Mask Register */ macro
47 #define REG_RTC_IMR (0x400E1888) /**< (RTC) Interrupt Mask Register */ macro63 #define REG_RTC_IMR (*(__I uint32_t*)0x400E1888U) /**< (RTC) Interrupt Mask Register */ macro
45 #define REG_RTC_IMR (0x400E1A88U) /**< \brief (RTC) Interrupt Mask Register */ macro59 #define REG_RTC_IMR (*(__I uint32_t*)0x400E1A88U) /**< \brief (RTC) Interrupt Mask Register */ macro
47 #define REG_RTC_IMR (0x400E1888) /**< (RTC) Interrupt Mask Register */ macro64 #define REG_RTC_IMR (*(__I uint32_t*)0x400E1888U) /**< (RTC) Interrupt Mask Register */ macro
