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Searched refs:REG_PWM0_SCUPUPD (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpwm0.h113 #define REG_PWM0_SCUPUPD (0x40020030) /**< (PWM0) PWM Sync Channels Update Period Update Reg… macro
226 #define REG_PWM0_SCUPUPD (*(__O uint32_t*)0x40020030U) /**< (PWM0) PWM Sync Channels Update… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpwm0.h113 #define REG_PWM0_SCUPUPD (0x40020030) /**< (PWM0) PWM Sync Channels Update Period Update Reg… macro
225 #define REG_PWM0_SCUPUPD (*(__O uint32_t*)0x40020030U) /**< (PWM0) PWM Sync Channels Update… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpwm0.h113 #define REG_PWM0_SCUPUPD (0x40020030) /**< (PWM0) PWM Sync Channels Update Period Update Reg… macro
225 #define REG_PWM0_SCUPUPD (*(__O uint32_t*)0x40020030U) /**< (PWM0) PWM Sync Channels Update… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpwm0.h113 #define REG_PWM0_SCUPUPD (0x40020030) /**< (PWM0) PWM Sync Channels Update Period Update Reg… macro
225 #define REG_PWM0_SCUPUPD (*(__O uint32_t*)0x40020030U) /**< (PWM0) PWM Sync Channels Update… macro