Home
last modified time | relevance | path

Searched refs:REG_PWM0_CPRDUPD0 (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpwm0.h73 #define REG_PWM0_CPRDUPD0 (0x40020210) /**< (PWM0) PWM Channel Period Update Register (ch_num… macro
186 #define REG_PWM0_CPRDUPD0 (*(__O uint32_t*)0x40020210U) /**< (PWM0) PWM Channel Period Updat… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpwm0.h73 #define REG_PWM0_CPRDUPD0 (0x40020210) /**< (PWM0) PWM Channel Period Update Register 0 */ macro
185 #define REG_PWM0_CPRDUPD0 (*(__O uint32_t*)0x40020210U) /**< (PWM0) PWM Channel Period Updat… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpwm0.h73 #define REG_PWM0_CPRDUPD0 (0x40020210) /**< (PWM0) PWM Channel Period Update Register 0 */ macro
185 #define REG_PWM0_CPRDUPD0 (*(__O uint32_t*)0x40020210U) /**< (PWM0) PWM Channel Period Updat… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpwm0.h73 #define REG_PWM0_CPRDUPD0 (0x40020210) /**< (PWM0) PWM Channel Period Update Register (ch_num… macro
185 #define REG_PWM0_CPRDUPD0 (*(__O uint32_t*)0x40020210U) /**< (PWM0) PWM Channel Period Updat… macro