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Searched refs:REG_PWM0_CMUPD3 (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpwm0.h146 #define REG_PWM0_CMUPD3 (0x40020460) /**< (PWM0) PWM Channel Mode Update Register (ch_num =… macro
259 #define REG_PWM0_CMUPD3 (*(__O uint32_t*)0x40020460U) /**< (PWM0) PWM Channel Mode Update … macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpwm0.h145 #define REG_PWM0_CMUPD3 (0x40020460) /**< (PWM0) PWM Channel Mode Update Register (ch_num =… macro
257 #define REG_PWM0_CMUPD3 (*(__O uint32_t*)0x40020460U) /**< (PWM0) PWM Channel Mode Update … macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpwm0.h145 #define REG_PWM0_CMUPD3 (0x40020460) /**< (PWM0) PWM Channel Mode Update Register (ch_num =… macro
257 #define REG_PWM0_CMUPD3 (*(__O uint32_t*)0x40020460U) /**< (PWM0) PWM Channel Mode Update … macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpwm0.h145 #define REG_PWM0_CMUPD3 (0x40020460) /**< (PWM0) PWM Channel Mode Update Register (ch_num =… macro
257 #define REG_PWM0_CMUPD3 (*(__O uint32_t*)0x40020460U) /**< (PWM0) PWM Channel Mode Update … macro