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Searched refs:REG_PWM0_CMPMUPD3 (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpwm0.h52 #define REG_PWM0_CMPMUPD3 (0x4002016C) /**< (PWM0) PWM Comparison 0 Mode Update Register 3 */ macro
165 #define REG_PWM0_CMPMUPD3 (*(__O uint32_t*)0x4002016CU) /**< (PWM0) PWM Comparison 0 Mode Up… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpwm0.h52 #define REG_PWM0_CMPMUPD3 (0x4002016C) /**< (PWM0) PWM Comparison 0 Mode Update Register 3 */ macro
164 #define REG_PWM0_CMPMUPD3 (*(__O uint32_t*)0x4002016CU) /**< (PWM0) PWM Comparison 0 Mode Up… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpwm0.h52 #define REG_PWM0_CMPMUPD3 (0x4002016C) /**< (PWM0) PWM Comparison 0 Mode Update Register 3 */ macro
164 #define REG_PWM0_CMPMUPD3 (*(__O uint32_t*)0x4002016CU) /**< (PWM0) PWM Comparison 0 Mode Up… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpwm0.h52 #define REG_PWM0_CMPMUPD3 (0x4002016C) /**< (PWM0) PWM Comparison 0 Mode Update Register 3 */ macro
164 #define REG_PWM0_CMPMUPD3 (*(__O uint32_t*)0x4002016CU) /**< (PWM0) PWM Comparison 0 Mode Up… macro