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Searched refs:REG_PWM0_CDTYUPD2 (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpwm0.h87 #define REG_PWM0_CDTYUPD2 (0x40020248) /**< (PWM0) PWM Channel Duty Cycle Update Register (ch… macro
200 #define REG_PWM0_CDTYUPD2 (*(__O uint32_t*)0x40020248U) /**< (PWM0) PWM Channel Duty Cycle U… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpwm0.h87 #define REG_PWM0_CDTYUPD2 (0x40020248) /**< (PWM0) PWM Channel Duty Cycle Update Register 2 */ macro
199 #define REG_PWM0_CDTYUPD2 (*(__O uint32_t*)0x40020248U) /**< (PWM0) PWM Channel Duty Cycle U… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpwm0.h87 #define REG_PWM0_CDTYUPD2 (0x40020248) /**< (PWM0) PWM Channel Duty Cycle Update Register 2 */ macro
199 #define REG_PWM0_CDTYUPD2 (*(__O uint32_t*)0x40020248U) /**< (PWM0) PWM Channel Duty Cycle U… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpwm0.h87 #define REG_PWM0_CDTYUPD2 (0x40020248) /**< (PWM0) PWM Channel Duty Cycle Update Register (ch… macro
199 #define REG_PWM0_CDTYUPD2 (*(__O uint32_t*)0x40020248U) /**< (PWM0) PWM Channel Duty Cycle U… macro