Home
last modified time | relevance | path

Searched refs:REG_PWM0_CDTYUPD0 (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpwm0.h71 #define REG_PWM0_CDTYUPD0 (0x40020208) /**< (PWM0) PWM Channel Duty Cycle Update Register (ch… macro
184 #define REG_PWM0_CDTYUPD0 (*(__O uint32_t*)0x40020208U) /**< (PWM0) PWM Channel Duty Cycle U… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpwm0.h71 #define REG_PWM0_CDTYUPD0 (0x40020208) /**< (PWM0) PWM Channel Duty Cycle Update Register 0 */ macro
183 #define REG_PWM0_CDTYUPD0 (*(__O uint32_t*)0x40020208U) /**< (PWM0) PWM Channel Duty Cycle U… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpwm0.h71 #define REG_PWM0_CDTYUPD0 (0x40020208) /**< (PWM0) PWM Channel Duty Cycle Update Register 0 */ macro
183 #define REG_PWM0_CDTYUPD0 (*(__O uint32_t*)0x40020208U) /**< (PWM0) PWM Channel Duty Cycle U… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpwm0.h71 #define REG_PWM0_CDTYUPD0 (0x40020208) /**< (PWM0) PWM Channel Duty Cycle Update Register (ch… macro
183 #define REG_PWM0_CDTYUPD0 (*(__O uint32_t*)0x40020208U) /**< (PWM0) PWM Channel Duty Cycle U… macro