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Searched refs:REG_MCLK_INTENSET (Results 1 – 11 of 11) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samc21/instance/
Dmclk.h36 #define REG_MCLK_INTENSET (0x40000802) /**< \brief (MCLK) Interrupt Enable Set */ macro
45 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000802UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/samc20/instance/
Dmclk.h36 #define REG_MCLK_INTENSET (0x40000802) /**< \brief (MCLK) Interrupt Enable Set */ macro
45 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000802UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dmclk.h36 #define REG_MCLK_INTENSET (0x40000802) /**< \brief (MCLK) Interrupt Enable Set */ macro
47 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000802UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dmclk.h36 #define REG_MCLK_INTENSET (0x40000802) /**< \brief (MCLK) Interrupt Enable Set */ macro
47 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000802UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/samc20n/instance/
Dmclk.h36 #define REG_MCLK_INTENSET (0x40000802) /**< \brief (MCLK) Interrupt Enable Set */ macro
46 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000802UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dmclk.h36 #define REG_MCLK_INTENSET (0x40000802) /**< \brief (MCLK) Interrupt Enable Set */ macro
47 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000802UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/samc21n/instance/
Dmclk.h36 #define REG_MCLK_INTENSET (0x40000802) /**< \brief (MCLK) Interrupt Enable Set */ macro
46 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000802UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dmclk.h36 #define REG_MCLK_INTENSET (0x40000802) /**< \brief (MCLK) Interrupt Enable Set */ macro
47 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000802UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/samr34/instance/
Dmclk.h37 #define REG_MCLK_INTENSET (0x40000402) /**< \brief (MCLK) Interrupt Enable Set */ macro
51 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000402UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/samr35/instance/
Dmclk.h37 #define REG_MCLK_INTENSET (0x40000402) /**< \brief (MCLK) Interrupt Enable Set */ macro
51 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000402UL) /**< \brief (MCLK) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/saml21/instance/
Dmclk.h37 #define REG_MCLK_INTENSET (0x40000402) /**< \brief (MCLK) Interrupt Enable Set */ macro
51 #define REG_MCLK_INTENSET (*(RwReg8 *)0x40000402UL) /**< \brief (MCLK) Interrupt Enable Se… macro