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Searched refs:REG_GMAC_ISR (Results 1 – 7 of 7) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dgmac.h44 #define REG_GMAC_ISR (0x40034024U) /**< \brief (GMAC) Interrupt Status Register */ macro
136 #define REG_GMAC_ISR (*(RoReg*)0x40034024U) /**< \brief (GMAC) Interrupt Status Register */ macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dgmac.h44 #define REG_GMAC_ISR (0x42000824) /**< \brief (GMAC) Interrupt Status Register */ macro
156 #define REG_GMAC_ISR (*(RwReg *)0x42000824UL) /**< \brief (GMAC) Interrupt Status Re… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dgmac.h44 #define REG_GMAC_ISR (0x42000824) /**< \brief (GMAC) Interrupt Status Register */ macro
156 #define REG_GMAC_ISR (*(RwReg *)0x42000824UL) /**< \brief (GMAC) Interrupt Status Re… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dgmac.h54 #define REG_GMAC_ISR (0x40050024) /**< (GMAC) Interrupt Status Register */ macro
253 #define REG_GMAC_ISR (*(__I uint32_t*)0x40050024U) /**< (GMAC) Interrupt Status Registe… macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dgmac.h54 #define REG_GMAC_ISR (0x40050024) /**< (GMAC) Interrupt Status Register */ macro
254 #define REG_GMAC_ISR (*(__I uint32_t*)0x40050024U) /**< (GMAC) Interrupt Status Registe… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dgmac.h102 #define REG_GMAC_ISR (0x40050024) /**< (GMAC) Interrupt Status Register */ macro
326 #define REG_GMAC_ISR (*(__I uint32_t*)0x40050024U) /**< (GMAC) Interrupt Status Registe… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dgmac.h102 #define REG_GMAC_ISR (0x40050024) /**< (GMAC) Interrupt Status Register */ macro
326 #define REG_GMAC_ISR (*(__I uint32_t*)0x40050024U) /**< (GMAC) Interrupt Status Registe… macro